• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.8
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• pp.593-600
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• 2010

In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 ${\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.9-9
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• 2010

In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.1-7
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• 2010

In this paper, we suggested a sensing method of PoRAM with the multilevel cell When a specific voltage is applied between top and bottom electrodes of PoRAM unit cell, we can distinguish cell states by changing resistance values of the cell. Especially, we can use the PoRAM as the multilevel cell due to have four stable resistance values per cell. Therefore, we proposed an address decoding method, sense amplifier and control signal for sensing of a multilevel cell. The sense amplifier is designed based on a current comparator that compared a cell current the cell with a reference current, and have a low input impedance for a amplification of the current. The proposed circuit was designed in a $0.13{\mu}m$ CMOS technology, we verified to sense each data "00", "01", "10", "10" by four states of a cell current.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.4
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• pp.80-85
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• 2011

A time-pickoff circuit used for time measurement suffers from a timing error due to the dependence of the generation time of a timing pulse on the size of the input signal, i.e., time walk. In this study, a time-pickoff method, which employs an automatic gain control (AGC) circuit, is proposed for reducing the timing error. The AGC circuit is added to the input of the comparator, and it renders the sizes of input signals of the comparator relatively uniform. The performance of the proposed time-pickoff method is analyzed using the SPICE simulation, and experiments are performed to confirm the analytical results. The measured time walk is reduced to 2.000 ns by 65% for input signals with a dynamic range of 20 dB as compared to a typical leading-edge discriminator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.81-89
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• 2007

The Viterbi decoder, which employs the maximum likelihood decoding method, is a critical component in forward error correction for digital communication system. However, lowering power consumption on the Viterbi decoder is a difficult task since the number of paths calculated equals the number of distinctive states of the decoder and the Viterbi decoder utilizes trace-back method. In this paper, we propose a method which minimizes the number of operations performed on the comparator, deployed in the SPEC-T Viterbi decoder implementation. The proposed comparator was applied to the ACSU(Add-Compare-Select Unit) and MPMSU(Minimum Path Metric Search Unit) modules on the decoder. The proposed ACS scheme and MPMS scheme shows reduced power consumption by 10.7% and 11.5% each, compared to the conventional schemes. When compared to the SPEC-T schemes, the proposed ACS and MPMS schemes show 6% and 1.5% less power consumption. In both of the above experiments, the threshold value of 26 was applied.

• Proceedings of the KIEE Conference
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• 2000.11d
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• pp.787-790
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• 2000

본 논문에서는 비교기의 설계 및 확장에 쉽게 이용할 수 있는 2bit 인코딩방법을 제안한다. 그리고 제안한 인코딩 방법을 이용하여 현재 비교기로 널리 사용하는 74LS85와 새로 설계한 5bit비교기에서의 직/병렬 N-bit로 확장했을 때의 응용방법을 비교한다. 또한 magnitude 비교기를 이용한 디코더 회로를 꾸며 음수 영역까지 확장할 수 있음을 보인다.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1019-1022
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• 2003

This paper has proposed a 4- bit 20MHz Flash A/D converter design available analog signal processing and realized its intergrated circuit. The parallel comparison method A/D converter quantized analog signals swiftly using various converters. Also this theme has designed economic power dissipation circuit using a preamplifier of low volt & power CMOS comparator. Also the system was fabricated by Hynix 0.35um CMOS process.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.992-997
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• 1987

This paper describes the design and fabrication of an integrated circuit that can separate the horizontal SYNC., vertical SYNC. and composite SYNC. signal included in a composite video signal. The circuit that is based on the comparator level samplign method can separate a stable SYNC. signal even from an external circuit with large variation. It has been fabrivated by the SST bipolar process. Its chip size is 1.5x1.5mm\ulcorner As a result, we succeeded in fabrication of IC which satisfied DC characteristics and SYNC. singal separator function.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.11
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• pp.1183-1190
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• 1990

In this paper, instantaneous reactive power compensation algorithm is proposed and analyzed. The static Var generator developed in this paper is the current source PWM converter using hysteresis comparator method, which compensates the reactive power by detecting each instantaneous phase voltage and line current, independently. Some aspects on the static Var compensator-such as inductance, capacitance, hysteresis width, and switching frequency, etc.-are discussed. The dynamic performances are examined through digital simulation and experimental test.

• Journal of Advanced Marine Engineering and Technology
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• v.19 no.3
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• pp.91-98
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• 1995

To control speed or torque of induction motors, scalar control method that regulates the value of stator current had been used conventionally. But, vector control method which contrls the direction and the value of stator current at the same time has been introduced lately and employed widely. This paper describes comparative analyses of above two methods by computer simulation. As a result of the simulation, both methods showed good responses for high speed, but, vector control method characterized much better performance for low speed and sinusoidal input.