• 제목/요약/키워드: collector ring

검색결과 12건 처리시간 0.026초

발전용 발전기 여자설비의 오일 오염방지 (Prevention of Oil Contamination in the Excitation System of a Power Plant Generator)

  • 최재규;유호선;문승재
    • 플랜트 저널
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    • 제7권2호
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    • pp.30-38
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    • 2011
  • The purpose of this paper is to review the understanding of pollution causes in the excitation system and how to solve the problem. The cause of the problem was in-leakage of bearing lubricant oil through the gap between rotor and outer in the air deflector, which was triggered by a negative pressure with respect to the operation of a collector ring fan in the collector house. In order to prevent exciting current transmission equipment pollutant, the reduction of the negative gage pressure of the inside of collector house is required. The protection in-leakage of bearing lubricant oil through the gap between rotor and outer of the air deflector are necessary. The reduction of the inside diameter of air deflector and the expansion of inlet filter of collector house are inevitable.

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발전기 브러시기어(Brush Gear) 관리방법 고찰 (A study on the maintenance for the brush gear of the generator)

  • 이간운;박문동;차재만
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 B
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    • pp.795-797
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    • 2003
  • As defects may be found in the brush gear of the generator due to the quality of the collector ring and the operation environment. A research on the operation condition and defect factors of the collector ring and brush, in relation to the brush gears in generators operating within Korea has been carried out, as well as an analysis of factors that affect the collector rings.

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고성능 $I^2L$을 위한 새로운 제작공정 (A New Process for a High Performance $I^2L$)

  • 한철희;김충기;서광석
    • 대한전자공학회논문지
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    • 제18권1호
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    • pp.51-56
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    • 1981
  • 양호한 특성의 I2L 구조를 구현하기 위한 새로운 공정을 제안하였다. 이 구조에서는, extrinsic base 의 불순물 농도가 높으며, 또한 collector는 불순물 농도가 낮은 intrinsic base와 self align된다. 제안한 공정에서는 spin-on source를 확산원으로 사용하였고, mask 단계를 줄이기 위하여 열처리로 단단해진 spin-on source를 확산 mask로 사용하였다. 이 공정에 의하여 13단 ring oscil-lator를 포함한 시험소자를 6.5μm의 epi 충을 갖는 n/n+ silicon wafer 상에 제작하였다. 제작한 시험소자의 특성은, collector가 세 개인 I2L의 경우 npn transistor의 상향 전류이득은 최대치가 8이었으며, collector가 하나인 I2L의 속도전력적과 최소 전달 지연시간은 각각3.5 pJ과 50ns 이었다.

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병합트랜지스터를 이용한 고속, 고집적 ISL의 설계 (Design of a high speed and high intergrated ISL(Intergrated Schottky Logic) using a merged transistor)

  • 장창덕;이용재
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 1999년도 춘계종합학술대회
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    • pp.415-419
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    • 1999
  • Many bipolar logic circuit of conventional occurred problem of speed delay according to deep saturation state of vertical NPN Transistor. In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. The structure of Gate consists of the vertical NPN Transistor, substrate and Merged PNP Transistor. In the result, we fount that tarriers which are coming into intrinsic Base from Emitter and the portion of edge are relatively a lot, so those make Base currents a lot and Gain is low with a few of collector currents because of cutting the buried layer of collector of conventional junction area. Merged PNP Transistor's currents are low because Base width is wide and the difference of Emitter's density and Base's density is small. we get amplitude of logic voltage of 200mv, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26nS in AC characteristic output of Ring-Oscillator connected Gate.

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가스터빈 발전기의 계자권선 손상에 관한 역학적 분석 (Mechanical Analysis of Field Coil Deformation in Gas Turbine Generator)

  • 한석우;권영동;최규하
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 A
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    • pp.107-109
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    • 1998
  • This paper presents mechanical analysis of gas turbine generator (113MVA, $3{\phi}$, 2P, 0.9PF, F class, 3600rpm, 60Hz, 13.8kV, 4.72kA, Air-Cooling) field coil deformation. Rotor end coil deformation is only appeared on turbine end but collector end coil is normal. Expansion direction of end coil is tangential not axial. Deformation appears more severe at top turn. Retaining ling is expanded by centrifugal force of coil and itself. In case friction coefficient between coil top surface and retaining ring insulation inner surface is small, coil end length ${\ell}$ does not change. However, in case friction coefficient big condition, coil end is expanded ${\Delta}{\ell}$ due to start and stop. Deformation is assumed about 30mm by watching photograph inner surface of retaining ring is coated by Teflon at manufacturing condition. Usually Teflon coating insulation surface is small friction coefficient. It's value 0.08${\sim}$0.15. However it's value exceeds more than 0.297. Since top turn deformation appears. The distortion and subsequent failure have occurred because of the lack of a sufficient slip-plane between the top field coil conductors and the inside surface of the retaining ring insulation on the turbine end of the field-winding.

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80V BICMOS 소자의 공정개발에 관한 연구 (A Study on the 80V BICMOS Device Fabrication Technology)

  • 박치선;차승익;최연익;정원영;박용
    • 전자공학회논문지A
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    • 제28A권10호
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    • pp.821-829
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    • 1991
  • In this paper, a BICMOS technology that has CMOS devices for digital application and bipolar devices for high voltage (80V) analog applications is presented. Basic concept to design BICMOS device is simple process technology without making too many performance trade-offs. The base line process is poly gate p-well CMOS process and three additional masking steps are added to improve bipolar characteristics. The key ingredients of bipolar integration are n+ buried layer process, up/down isolation process and p-well base process. The bipolar base region is formed simultaneously with the region of CMOS p-well area to reduce mask and heat cycle steps. As a result, hFE value of NPN bipolar transistor is 100-150(Ic=1mA). Collector resistance value is 138 ohm in case of bent type collector structure. Breakdown voltage of BVebo, BVcbo and BVceo are 21V, 115V and78V respectively. Threshold voltage is ${\pm}$1.0V for NMOS and PMOS transistor. Breakdown voltage of NMOS and PMOS transistor is obtained 22V and 19V respectively. 41 stage CMOS ring oscillator has 0.8ns delay time.

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Effective Volume of the Korea Research Institute of Standards and Science Free Air Chamber L1 for Low-Energy X-Ray Measurement

  • Chul-Young Yi;Yun Ho Kim;Don Yeong Jeong
    • 한국의학물리학회지:의학물리
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    • 제33권1호
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    • pp.1-9
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    • 2022
  • Purpose: To evaluate the effective volume of the Korea Research Institute of Standards and Science free air chamber (KRISS FAC) L1 used for the primary standard device of the low-energy X-ray air kerma. Methods: The mechanical dimensions were measured using a 3-dimensional coordinate measuring machine (3-d CMM, Model UMM 500, Carl Zeiss). The diameter of the diaphragm was measured by a ring gauge calibrator (Model KRISS-DM1, KRISS). The elongation of the collector length due to electric field distortion was determined from the capacitance measurement of the KRISS FAC considering the result of the finite element method (FEM) analysis using the code QuickField v6.4. Results: The measured length of the collector was 15.8003±0.0014 mm with a 68% confidence level (k=1). The aperture diameter of the diaphragm was 10.0021±0.0002 mm (k=1). The mechanical measurement volume of the KRISS FAC L1 was 1.2415±0.0006 cm3 (k=1). The elongated length of the collector due to the electric field distortion was 0.170±0.021 mm. Considering the elongated length, the effective measurement volume of the KRISS FAC L1 was 1.2548±0.0019 cm3(k=1). Conclusions: The effective volume of the KRISS FAC L1 was determined from the mechanically measured value by adding the elongated volume due to the electric field distortion in the FAC. The effective volume will replace the existing mechanically determined volume in establishing and maintaining the primary standard of the low-energy X-ray.

홀 효과와 에미터 인젝션 모듈레이션이 결합된 자기트랜지스터의 포화영역에서의 민감도 증가 현상에 관한 연구 (A Study on the Sensitivity Increase of the Magnetotransistor with Combined Hall Effect and Emitter Injection Modulation Operated in the Saturation Region)

  • 강욱성;이승기
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 C
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    • pp.1434-1436
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    • 1995
  • We designed and fabricated a highly sensitive magnetotransistor which employes the emitter region as a Hall plate for inducing Hall voltage across the emitter. The Hall voltage modulates the emitter basic junction bias on both sides of the emitter so that a large collector current difference is resulted. The specially designed $p^+$ ring around the emitter enhances accumulation of drifted electrons in the emitter and thus the Hall voltage. A relative sensitivity of 240/tesla is measured by operating the device in the saturation mode.

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CMOS공정에 의한 SSIMT의 제작 및 특성 (Fabrication and characteristics of SSIMT using a CMOS Process)

  • 송윤귀;임재환;정귀상;김남호;류지구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.168-171
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    • 2002
  • A SSIMT(Suppressed Sidewall Injection Magnetotransistor) sensor with high linearity is presented in this thesis. The prototype is fabricated by using the Hynix 0.6$\mu\textrm{m}$ P-substrate twin-well double poly three-metal CMOS Process. The fabricated SSIMT shows that variation of the collector current is extremely linear by varing the magnetic induction from -200mT to 200mT at I$\_$B/=500${\mu}$A, V$\_$CE/=2V and V$\_$SUB/=5V. The relative sensitivity is up to 120%/T. At B = 0, magnetic offset is about 79mT, there relative sensitivity is 30.5%/T. The nonlinearity of the fabricated SSIMT is measured about 1.4%.

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CMOS 공정에 의한 Suppressed Sidewall Injection Magnetotransistor의 특성 (Characteristics of the Suppressed Sidewall Injection Magnetotransistor using a CMOS Process)

  • 송윤귀;최영식;김남호;류지구
    • 한국전기전자재료학회논문지
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    • 제17권10호
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    • pp.1029-1033
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    • 2004
  • In this paper, we propose a new Suppressed Sidewall Injection Magnetotransistor(SSIMT) architecture, which allows to overcome the restriction of the standard CMOS technology and achieve high linearity. The proposed SSIMT is designed based on the Hynix 0.6 um standard CMOS technology. The fabricated SSIMT has been experimentally verified. The SSIMT shows that the change of collector current is extremely linear as a function of the magnetic induction at $I_{B}$ =500$\mu$A, $V_{CE}$ =2V and VSE =5 V. The relative sensitivity is up to 120 %/T. The magnetic conversion offset is about 79 mT with 30.5 %/T relative sensitivity. The nonlinearity of the fabricated SSIMT is measured about 1.4 %.%.