• Title/Summary/Keyword: circuit switching

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Reliability Constrained Resource Allocation in Cellular Network Uplink Scheduler (이동통신 역방향 스케줄러에서의 고신뢰성 자원 할당 기법)

  • Lee, Sung-Won;Jung, Kwang-Ryul;Park, Ae-Soon
    • Journal of the Korea Society of Computer and Information
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    • v.15 no.12
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    • pp.57-66
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    • 2010
  • In this paper, we propose the reliability constrained resource allocation scheduling algorithm in cellular network for uplink transmission, where uplink transmission is supported via packet switching schemes without the dedicated uplink circuit links. We evaluate the performance of the proposed algorithm, and compared with the conventional works to identify the pros and cons. The proposed uplink scheduling algorithm is to satisfy the constraints requirements of the MTC services which is considered as the core technology for future mobile wireless networks. It is different to conventional works which target to maximize the link capacity. The proposed algorithm provides reliable uplink transmission independent to the location and the quality of the wireless link of the mobile terminal. Based on the performance evaluation results, we conclude that the proposed method provides enhanced reliability performance than conventional works.

Comparison of Starting Current Characteristics for Three-Phase Induction Motor Due to Phase-control Soft Starter and Asynchronous PWM AC Chopper

  • Thanyaphirak, Veera;Kinnares, Vijit;Kunakorn, Anantawat
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1090-1100
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    • 2017
  • This paper presents the comparison of starting current characteristics of a three-phase induction motor fed by two types of soft starters. The first soft starter under investigation is a conventional AC voltage controller on the basis of a phase-control technique. The other is the proposed asynchronous PWM AC chopper which is developed from the conventional synchronous PWM AC chopper. In this paper, the proposed asynchronous PWM AC chopper control scheme is developed by generating only two asynchronous PWM signals for a three-phase main power circuit (6 switching devices) from a single voltage control signal which is compared with a single sawtooth carrier signal. By this approach, the PWM signals are independent and easy to implement since the PWM signals do not need to be synchronized with a three-phase voltage source. Details of both soft starters are discussed. The experimental and simulation results of the starting currents are shown. It is found that the asynchronous PWM AC chopper efficiently works as a suitable soft starter for the three-phase induction motor due to that the starting currents are reduced and are sinusoidal with less harmonic contents, when being compared with the starting current waveforms using the conventional phase-control starting technique. Also the proposed soft starter offers low starting electromagnetic torque pulsation.

High Power Density Open-frame Type DC-DC Converter Module with Constant Current Control (정전류 제어 기능이 부가된 고전력밀도의 개방형 DC-DC 컨버터 모듈)

  • Lee Darl-Woo;Ahn Tae-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.4
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    • pp.380-387
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    • 2005
  • We report the performance of an open-frame type low-voltage high-current DC-DC converter module developed using an active clamp forward converter circuit and single ended rectifier. The converter module is designed with the specifications of an 3.3V output voltage, 30A output current, 100W output power and 36-75V input voltage. The synchronous rectifier is used to reduce the conduction loss at high current level and constant current control using precision PCB resistance is adapted to enhance the over current protection function in the system configuration. A prototype converter module is successfully implemented within 8mm height and quarter brick size (58x37mm) and recorded an $95W/in^3$ power density, 90.6$\%$ efficiency and 0.07$\%$ voltage regulation for the entire Input voltage range, thereby demonstrating its application potentials to future telecommunication electronics.

High Power Factor Converter for Electric Vehicle Chargers (전기자동차 충전기용 고역율 콘버어터 회로)

  • 김영민;이수원;모창호;유철로
    • The Transactions of the Korean Institute of Power Electronics
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    • v.2 no.1
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    • pp.33-38
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    • 1997
  • Generally, various semiconductor switching devices for power systems are used in battery chargers for electric vehicle. When these used, it takes the problems of transient-current or distortion of waveforms in power systems near by battery chargers because of harmonics and large peak-current, low power factor, etc., caused by the non-linearity of these devices. Recently, power factor control, line current peak-cut, harmonics reduction which was ignored in past is more and more important. In this paper, to solve those problems we will improve the characteristics of voltage rising and propose the high power factor converter circuit for battery chargers. Our proposed system convert commutated voltage to AC resonant wave in high frequency inverter and rectify the link voltages passed high-frequency transformer and transfer the DC voltages. Especially, the effect using these converter system can be improved very large by power factor control and we have to verify the possibilities of improvement through the experiment of Pb-Acid battery application.

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Single Core Push Pull Forward Converter Operational Characteristics (싱글 코어 푸시풀 포워드 컨버터 동작특성)

  • Kim Chang-Sun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.6
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    • pp.592-597
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    • 2005
  • The push pull forward converter is suitable in a low output voltage, a high output current applications with wide input voltage ranges. All magnetic components including output inductor, transformer and input filter can be integrated into single EI/EE core. The integrated push pull forward converter is considered through the comparison of efficiency according to the circuit parameters. The Nicera company's 5M FEE18/8/10C and NC-2H FEI32/8/20 cores are used for the transformer. The integrated push pull forward converter ratings are of $36\~72V$ input and 3.3V/30A output. In case that NC-2H FEI32/8/20 core used in the converter, the efficiency is measured up to $83.5\%$ at the switching frequency 200 kHz and the 11A load. The efficiencies of $76.4\%$ at a full load and $82.95\%$ at a half load are measured.

Measurement and Analysis of Magnetic Fields and Induced Voltages Caused by Home Appliances (가정용 전기기구에서 발생하는 자장과 유도전압의 측정과 분석)

  • 이복희;이동문;장영태;장근철;엄주홍;강성만;이승칠;박정용
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.6
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    • pp.51-59
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    • 2002
  • This paper deals with the measurement and analysis of the induced voltages and magnetic fields caused by the operation of home appliances. The induced voltage and magnetic field measurement circuit used in this work consists of the induction coil, the operational preamplifier and the active integrator. Television set and monitors for personal computer cause strong magnetic fields rich in harmonics and high induced voltages by using the switching power suppliers. The strong magnetic field intensity and high induced voltage were created by 14" television set, and their values are 2.1 [$\mu$Tp-p]and 140 [mVp-p]at the distance of 0.4 [m], respectively. However, the induced voltage per unit magnetic field intensity was created by 17" monitor for personal computer and the measured data was approximately 560[mV/$\mu$T]at the same distance. distance.

Development of a Packet-Switched Public Computer Network -PART 3:X.25 Software Design and Implementation of the KORNET NNP (Packet Switching에 의한 공중 Computer 통신망 개발 연구-제3부:KORNET NNP의 X.25 Software 설계 및 구현)

  • Choi Jun Kyun;Kim Nak Myeong;Kim Hyung Soon;Un Chong Kwan;Im Gi Hong;Cho Young Jong;Cho Dong Ho
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.1
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    • pp.1-9
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    • 1986
  • This is the third part of the four-part paper describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the X.25 protocol connecting packet mode data terminal equipments(PDTE's) with data circuit terminating equipments(DCE's). In the KORNET, the X.25 protocol has been implemented on the line processing module-A(LPMA) of the network node processor(NNP). In the implementation of X.25, we have divided the software module according to the service function, and have determined the the rules that interact between the modules. Each layer protocol has been developed using the technique of the finite state machine. Before the actual coding of softwares, we hafve used formal software development tools based on the specification and description language (SDL) and program design languate (PDL) recommended by the CCITT. In addition, for the efficient operation of the X.25 protocol system we have analyzed the system performance and the service scheduling method of each module. The results will also be given.

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Development of a Packet-Switched Public Computer Network -PART 4:PAD Protocol and Network Management Software of the KORNET NNP (Packet Switching에 의한 공중 computer 통신망 개발 연구 -제4부:KORNET NNP의 PAD Protocol 및 Network Management Software의 구현)

  • Kim Sang Ryong;Geum Seong;Kim Je Woo;Oh Kyong Ae;Un Chong Kwan;Lee Jong Rak;Seo In Soo;Cho Dong Ho;Choi Jun Kyun
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.1
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    • pp.10-19
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    • 1986
  • This is the last part of the four-part describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the packet assembler/dissassembler (PAD) protocol for the asynchronous channel service, and of the network management softwares. The line processing module-B(LPMB) system supporting the asynchronous line includes a PAD protocol, a packet mode DTE/DCE protocol converting to the X.25 protocol, and the asynchronous receiver/transmitter(ART) software. The network management software is operated in master central processing module(MCPM) which includes virtual circuit management (VCM) managing the user channel, the routing management and the high level protocol for communication between the network management center (NMC) and the network node processor(NNP). In this paper, the design, implementation and operation of the softwares for the above service functions will be described in detail.

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Macro-Micro Reconfigurable Antenna for Multi Mode & Multi Band(MMMB) Communication Systems (다중 모드 다중 대역(MMMB) 통신 환경을 위한 매크로-마이크로 주파수 재구성 안테나)

  • Yeom, In-Su;Choi, Jung-Han;Jung, Young-Bae;Kim, Dong-Ho;Jung, Chang-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.10
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    • pp.1031-1041
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    • 2009
  • A small microstrip monopole antenna for macro-micro frequency tuning over multiple bands is presented. The meander-shape antenna is fabricated on a conventional printed circuit board(FR-4, $\varepsilon_r=4.4$ and tan $\delta=0.02$). The antenna operates over WiBro(2.3~2.4 GHz) and WLAN a/b(2.4~2.5 GHz/5.15~5.35 GHz) service bands with an essentially constant antenna gain within each service band. Two diodes, a PIN diode and a varactor, are embedded into the antenna for frequency reconfiguration. The PIN diode is used for frequency switching(macro-tuning) between 2 GHz and 5 GHz bands while the varactor is used for frequency tuning(micro-tuning) within the service bands, 2.3~2.5 GHz and 5.15~5.35 GHz. Unwanted resonances between the two frequency bands(2 GHz and 5 GHz) are suppressed by filling up the gaps between the meander lines. The antenna gain is essentially constant and higher than 2 dBi within each service band. The measured performance of the proposed antenna system suggests the macro-micro frequency tuning techniques be useful in reconfigurable wireless communication systems.

Design of Low Power 12Bit 80MHz CMOS D/A Converter using Pseudo-Segmentation Method (슈도-세그멘테이션 기법을 이용한 저 전력 12비트 80MHz CMOS D/A 변환기 설계)

  • Joo, Chan-Yang;Kim, Soo-Jae;Lee, Sang-Min;Kang, Jin-Ku;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.13-20
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    • 2008
  • This paper describes the design of low power 12bit Digital-to-Analog Converter(D/A Converter) using Pseudo-Segmentation method which shows the conversion rate of 80MHz and the power supply of 1.8V with 0.18um CMOS n-well 1-poly 6-metal process for advanced wireless communication system. Pseudo-segmentation method used in binary decoder consists of simple parallel buffer is employed for low power because of simpler configuration than that of thermometer decoder. Also, using deglitch circuit and swing reduced drivel reduces a switching noise. The measurement results of the proposed low power 12bit 80MHz CMOS D/A Converter shows SFDR is 66.01dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB is 10.67bit. Integral nonlinearity(INL) / Differential nonlinearity(DNL) have been measured ${\pm}1.6LSB/{\pm}1.2LSB$. Glich energy is measured $49pV{\cdot}s$. Power dissipation is 46.8mW at 80MHz(Maximum sampling frequency) at a 1.8V power supply.