• 한국세라믹학회지
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• 제33권10호
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• pp.1101-1108
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• 1996

No-doped PZT thin films have been fabricated on Pt/Ti/SiO2/Si substrate using Sol-Gel technique. A fast annealing metho (three times of intermediate and final annealing) was used for the preparation of multi-coated 1800$\AA$ thick Nb-doped PZT thin films. As Nb doping percent was increased leakage current was lowered approximately 2 order but dielectic properties were degraded due to the appearance of pyrochlore phase and domain pinning. Futhermore the increase of the final annealing temperature up to 74$0^{\circ}C$lowered the pyrochlore phase content resulting in enhancing the dielectric properties of the Nb doped films. The 3%-Nb doped PZT thin films with 5% excess Pb showed a capacitance density of 24.04 fF/${\mu}{\textrm}{m}$2 a dielectric loss of 0.13 a switchable polarization of 15.84 $\mu$C/cm2 and a coercive field of 32.7 kV/cm respectively. The leakage current density of the film was as low as 1.47$\times$10-7 A/cm2 at the applied voltage of 1.5 V.

• 마이크로전자및패키징학회지
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• 제9권1호
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• pp.29-33
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• 2002

The SrS:Cu, Ag thin film electroluminescient devices were fabricated on $AlTiO_3$/ITO/glass substrates by electron-beam evaporation. The emission spectrum of the device was about 460 nm with $\chi$=0.20, y=0.29 in the CIE color coordinator. It was found that the emission spectrum was saturated to pure blue color when Ag sensitizer was doped in SrS:CuCl phosphors. The luminance of the device was increased by increasing the sulfur pressure. The measured luminance was saturated with 430 cd/$m^2$at the applied voltage of 90 V and the maximum luminance was 580 cd/$m^2$at 110V. The polarization charge and conduction charge of the devices were found to be found to be about $3.5\mu$C/$\textrm{cm}^2$ and $7.4\mu$C/$\textrm{cm}^2$, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.29-32
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• 1999

$GaF_3$ films were directly grown on p' and p-type GaAs(100) substrates using a $SF_6$ plasma discharge system. GaAs MIS(Meta1-Insulator-Semiconductor) capacitor was successfully fabricated for about 1 hour at temperature $290^{\circ}C$ using the as-grown $GaF_3$ films. The as-grown films on p'-GaAs exhibited a current density of less than 6.68 $\times$ $1O^{-9}$ A/$cm^2$ at a breakdown field of 500kV/cm and a refractive index of 2.0 ~ 2.3 at a wavelength of 632.8 nm. The dielectric constant was about 5 derived from 1 MHz capacitance-voltage (C-V) measurements. Dielectric dispersion of the fluoridated films on p'-GaAs measured ranged from 100 Hz to 10 MHz was not observed.

• ETRI Journal
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• 제14권1호
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• pp.40-51
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• 1992

$0.25{\mu} m$ 급 pMOSFET소자를 구현하기 위해, $P^+$ 폴리실리콘을 적용한 pMOS를 제작하였으며, $p^+$ 폴리실리콘 게이트 소자에서 심각하게 문제가 되고 있는 붕소이온 침투현상을 조사하고 붕소이온 침투가 일어나지 않는 최적열처리온도를 조사하였다. 소자제조 공정중 게이트 공정만 전자선 (EBML300)을 이용하여 직접묘사하고 그 이외의 공정은 stepper(gline) 을 사용하는 Mix & Match 방법을 사용하였다. 또한 붕소이온 침투현상을 억제하기 위한 한가지 예로서, 실리콘산화막과 실리콘질화막을 적층한 ONO(Oxide/Nitride/Oxide) 구조를 게이트 유전체로 적용한 소자를 제작하여 그 가능성을 조사하였다. 그 결과 $850^{\circ}C$의 온도와 $N_2$ 분위기에서 30분동안 열처리 하였을 경우, 붕소이온의 침투현상이 일어나지 않음을 SIMS(Secondary Ion Mass Spectrometer) 분석 및 C-V(Capacitance-Voltage) 측정으로 확인할 수 있었으며 그 이상의 온도에서는 붕소이온이 침투되어 flat band전압(Vfb)을 변화시킴을 알았다. 6nm의 얇은 게이트 산화막 및 $0.1{\mu} m$ 이하의 LDD(Lightly Doped Drain) $p^-$의 얇은 접합을 형성함으로써 소자의 채널길이가 $0.2 {\mu} m$까지 짧은 채널효과가 거의 없는 소자제작이 가능하였으며, 전류구동능력은 $0.26\muA$/$\mu$m(L=0.2$\mu$m, V$_DS$=2.5V)이었고, subthreshold 기울기는 89-85mV/dec.를 얻었다. 붕소이온의 침투현상을 억제하기 위한 한가지 방법으로 ONO 유전체를 소자에 적용한 결과, $900^{\circ}C$에서 30분의 열처리조건에서도 붕소이온 침투현상이 일어나지 않음으로 미루어 , $SiO_2$ 게이트 유전체보다 ONO 게이트 유전체가 boron 침투에 대해서 좋은 장벽 역활을 함을 알았다. ONO 게이트 유전체를 적용한 소자의 경우, subthreshold특성은 84mV/dec로서 좋은 turn on,off 특성을 얻었으나, ONO 게이트 유전체는 막자체의 누설전류와 실리콘과 유전체 계면의 고정전하량인 Qss의 양이 공정조건에 따라 변화가 심해서 문턱전압 조절이 어려워 소자적용시 문제가 된다. 최근 바닥 산화막(bottom oxide) 두께가 최적화된 ONO 게이트 유전체에 대하 연구가 활발히 진행됨을 미루어, 바닥 산화막 최적화가 된다면 더 좋은 결과가 예상된다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권8호
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• pp.340-346
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• 2002

Capacitor material utilized in the downsizing passive devices and integration of passive devices requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. common capacitor materials, $Al_2O_3$, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$, TaN and et al., used until recently have reached their physical limits in their application to integration of passive devices. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism. This study presents the dielectric properties $Ta_2O_{5}$ MIM capacitor structure Processed by $O_2$ RTA oxidation. X-ray diffraction patterns showed the existence of amorphous phase in $600^{\circ}C$ annealing under the $O_2$ RTA and the formation of preferentially oriented-$Ta_2O_{5}$ in 650, $700^{\circ}C$ annealing and the AES depth profile showed $O_2$ RTA oxidation effect gives rise to the $O_2$ deficientd into the new layer. The leakage current density respectively, at 3~1l$\times$$10_{-2}$(kV/cm) were $10_{-3}$~$10_{-6}$(A/$\textrm{cm}^2$). In addition, behavior is stable irrespective of applied electric field. the frequency vs capacitance characteristic enhanced stability more then $Ta_2O_{5}$ thin films obtained by $O_2$ reactive sputtering. The capacitance vs voltage measurement that, Vfb(flat-band voltage) was increase dependance on the $O_2$ RTA oxidation temperature.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.8-9
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• 2006

Hafnium oxide ($HfO_2$) thin films were deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$. Prior to the deposition of $HfO_2$ films, a thin Hf ($10\;{\AA}$) metal layer was deposited. Deposition temperature of $HfO_2$ thin film was $350^{\circ}C$ and its thickness was $150\;{\AA}$. Samples were then annealed using furnace heating to temperature ranges from 500 to $900^{\circ}C$. The MOS capacitor of round-type was fabricated on Si substrates. Thermally evaporated $3000\;{\AA}$-thick AI was used as top electrode. In this work, We study the interface characterization of $HfO_2$/Hf/Si MOS capacitor depending on annealing temperature. Through AES(Auger Electron Spectroscopy), capacitance-voltage (C-V) and current-voltage (I-V) analysis, the role of Hf layer for the better $HfO_2$/Si interface property was investigated. We found that Hf meta1 layer in our structure effective1y suppressed the generation of interfacial $SiO_2$ layer between $HfO_2$ film and silicon substrate.

• 센서학회지
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• 제25권6호
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• pp.440-446
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• 2016

This study introduces the characteristics of current-voltage (I-V) and impedance variance for $ZnO-Zn_2BiVO_6-Co_3O_4$ (ZZCo), which is sintered at $900^{\circ}C$, according to temperature changes. ZZCo varistor demonstrates dramatic improvement of non-linear coefficient, ${\alpha}=66$, with lower leakage current and higher insulating resistivity than those of ZZ ($ZnO-Zn_2BiVO_6$) from the aspect of I-V curves. While both systems are thermally stable up to $125^{\circ}C$, ZZCo represents a higher grain boundary activation energy with 1.05 eV and 0.94 eV of J-E-T and from IS & MS, respectively, than that of ZZ with 0.73 eV and 0.82 eV of J-E-T and from IS & MS, respectively, in the region above $180^{\circ}C$. It could be attributed to the formation of $V^*_o$(0.41~0.47 eV) as dominant defect in two systems, as well as the defect-induced capacitance increase from 781 pF to 1 nF in accordance with increasing temperature. On the other hand, both the grain boundary capacitances of ZZ and ZZCo are shown to decrease to 357 pF and 349 pF, respectively, while the resistances systems decreased exponentially, in accordance with increasing temperature. So, this paper suggests that the application of newly formed liquid phases as sintering additives in both $Zn_2BiVO_6$ and the ZZCo-based varistors would be helpful in developing commercialized devices such as chips, disk-type ZnO varistors in the future.

• 공업화학
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• 제18권3호
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• pp.205-212
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• 2007

본 연구는 polyacrylonitrile (PAN)를 dimethyl formamide (DMF)에 용해시켜 전압조건을 8~20 kV, PAN 농도조건을 5~15 wt%, 그리고 tip-to-collector distance (TCD)를 15 cm로 다양한 조건에서 전기방사를 실시하였다. 나노섬유는 $250^{\circ}C$에서 1 h 동안 안정화시켰으며, $800{\sim}1000^{\circ}C$에서 1 h 동안 탄화시켰다. 안정화와 탄화 전후의 나노섬유의 구조 특성은 FT-IR 장비를 이용하여 연구하였으며 나노섬유의 직경분포와 모폴로지 특성을 알기 위해서 SEM 분석장비를 이용하였다. 나노섬유웹의 전기화학적 특성은 순환전류 전압곡선 특성 실험을 통해 고찰하였다. 실험 결과로부터 전기방사한 나노섬유의 직경의 크기는 일반적으로 방사용액의 농도와 인가전압에 영향을 받는다는 것을 확인할 수 있었으며 섬유의 평균 직경은 고분자의 농도 10 wt% 이상 증가함에 따라 감소하며 15 kV의 전압과 15 cm의 TCD 조건에서 섬유의 직경분포가 균일하고 평균직경이 작은 것으로 나타났다.

• 한국전기전자재료학회논문지
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• 제26권1호
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• pp.38-43
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• 2013

In this study we aims to examine the effects of $Co_3O_4$ and NiO doping on the defects and electrical properties in ZnO-$Bi_2O_3-Sb_2O_3$ (Sb/Bi=0.5) varistors. It seemed to form ${Zn_i}^{{\cdot}{\cdot}}$(0.20 eV) and ${V_o}^{\cdot}$(0.33 eV) as dominant defects in Co and Ni co-doped ZBS system, however only ${V_o}^{\cdot}$ appeared in Co- or Ni-doped ZBS. Even though the same defects it was different in capacitance (1.5~4.5 nF) and resistance ($0.3{\sim}9.5k{\Omega}$). The varistor characteristics were improved with Co and Co+Ni doping (non-linear coefficient, ${\alpha}$= 36 and 29, relatively) in ZBS. The various parameters ($N_d=1.43{\sim}2.33{\times}10^{17}cm^{-3}$, $N_t=1.40{\sim}2.28{\times}10^{12}cm^{-2}$, ${\Phi}b$=1.76~2.37 V, W= 98~118 nm) calculated from the C-V characteristics in our systems did not depend greatly on the type of dopant, which were in the range of a typical ZnO varistors. It should be derived a improved C-V equation carefully for more reliable parameters because the variation of the varistor capacitance as a function of the applied dc voltage is depend on the defect, frequency, and temperature.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.664-674
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• 2016

The electrical properties of Ti/p-type InP Schottky diodes with and without polyaniline (PANI) interlayer was investigated using current-voltage (I-V) and capacitance-voltage (C-V) measurements. The barrier height of Ti/p-type InP Schottky diode with PANI interlayer was higher than that of the conventional Ti/p-type InP Schottky diode, implying that the organic interlayer influenced the space-charge region of the Ti/p-type InP Schottky junction. At higher voltages, the current transport was dominated by the trap free space-charge-limited current and trap-filled space-charge-limited current in Ti/p-type InP Schottky diode without and with PANI interlayer, respectively. The domination of trap filled space-charge-limited current in Ti/p-type InP Schottky diode with PANI interlayer could be associated with the traps originated from structural defects prevailing in organic PANI interlayer.