• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2003.12a
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• pp.31-34
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• 2003

We developed a new systematic calibration procedure which was applied to the calibration of the diffusivity, segregation and TED model of the indium impurity. The TED of the indium impurity has been studied using 4 different groups of experimental conditions. Although the indium is susceptible to the TED, the RTA is effective to suppress the TED effect and maintain a steep retrograde profile. Like the boron, the indium shows significant oxidation-enhanced diffusion in silicon and has segregation coefficients at the $Si/SiO_2$ interface much less than 1. In contrast, however, the segregation coefficient of indium decreases as the temperature increases. The accuracy of the proposed technique is validated by SIMS data with errors less than 5% between simulation and experiment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.94-94
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• 2008

We have performed simulation for Junction Field Effect Transistor(JFET) using Silvco to improve its electrical properties. The device structure and process conditions of Si-control JFET(Si-JFET) were determined to set its cut off voltage and drain current(at Vg=0V) to -0.5V and $300{\mu}A$, respectively. From electrical property obtained at various implantation energy, dose, and drive-in conditions of p-gate doping, we found that the drive in time of p-type gate was the most determinant factor due to severe diffusion. Therefore we newly designed SiGe-JFET, in which SiGe layer is to epitaxial layers placed above and underneath of the Si-channel. The presence of SiGe layer lessen the p-type dopants (Boron) into the n-type Si channel the phenomenon would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer will be discussed in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

• Current Photovoltaic Research
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• v.4 no.2
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• pp.31-41
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• 2016

n-type PERT (passivated emitter, rear totally diffused) bifacial solar cells with boron and phosphorus diffusion as p+ emitter and n+ BSF (back surface field) have attracted significant research interest recently. In this work, the influences of wafer thickness, bulk lifetime, emitter, BSF on the photovoltaic characteristics of solar cells are discussed. The performance of the solar cell is determined by using one-dimensional solar cell simulation software PC1D. The simulation results show that the key role of the BSF is to decrease the surface doping concentration reducing the recombination and thus, increasing the cell efficiency. A lightly phosphorus doped BSF (LD BSF) was experimentally optimized to get low surface dopant concentration for n type bifacial solar cells. Pre-oxidation combined with a multi-plateau drive-in, using limited source diffusion was carried out before pre-deposition. It could reduce the surface dopant concentration with minimal impact on the sheet resistance.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.37-45
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• 1998

In this paper, we report the first three-dimensional simulation result of the transient enhanced diffusion(TED) of dopants in the ion-implanted silicon by employing our 3D semiconductor process simulator, INPROS system. In order to simulate three-dimensional TED redistribution of dopants in silicon, the dopant distributions after the ion implantation was calculated by Monte Carlo(MC) method, followed by finite element(FE) numerical solver for thermal annealing. Excellent agreement between the simulated 3D profile and the SIMS data has been obtained for ion-implanted arsenic and phosphorus after annealing the boron marker layer at 75$0^{\circ}C$ for 2 hours. Our three-dimensional TED simulation could successfully explain the reverse short channel effect(RSCE) by taking the 3D point defect distribution into account. A coupled TED simulation and device simulation allows reverse short channel effect on threshold to be accurately predicted.

• Korean Journal of Materials Research
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• v.14 no.12
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• pp.829-834
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• 2004

Annealing of $Cu(B)/Ti/SiO_2$ in vacuum has been carried out to investigate the effects of Ti underlayer on microstructure in $Cu(B)/Ti/SiO_2$ structures. For comparison, $Cu(B)/Ti/SiO_2$ structures was also annealed in vacuum. Three different temperature dependence of Cu growth can be seen in $Cu(B)/Ti/SiO_2$; B precipitates- pinned grain growth, abnormal grain growth, normal grain growth. The Ti underlayer having a strong affinity for B atoms reacts with the out-diffused B to the Ti surface and forms titanium boride at the Cu-Ti interface. The formation of titanium boride acts as a sink for the out-diffusion of B atoms. The depletion of boron in grain boundaries of Cu films, as results of the rapid diffusion of B along the grain boundaries and the insufficient segregation of B to the grain boundaries, induces grain boundaries to migrate and causes the abnormal grain growth. The increased bulk diffusion coefficient of B within Cu grains can be responsible for the normal grain growth occurring in the annealed $Cu(B)/Ti/SiO_2\;at\;600^{\circ}C$. In contrast, the $Cu/SiO_2$ structures show only the abnormal growth of grains and their sizes increasing as the temperature increases above $400^{\circ}C$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.11
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• pp.910-917
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• 2009

We have designed a new structures of Junction Field Effect Transistor(JFET) using SILVACO simulation to improve electrical properties and process reliability. The device structure and process conditions of Si control JFET(Si JFET) were determined to set cut off voltage and drain current(at Vg=0 V) to -0.46 V and $300\;{\mu}A$, respectively. Among many design parameters influencing the performance of the device, the drive-in time of p-type gate is presented most predominant effects. Therefore we newly designed SiGe JFET, in which SiGe layers were placed above and underneath of Si-channel. The presence of SiGe layer could lessen Boron into the n-type Si channel, so that it would be able to enhance the structural consistency of p-n-p junction. The influence of SiGe layer could be explained in conjunction with boron diffusion and corresponding I-V characteristics in comparison with Si-control JFET.

• Journal of Conservation Science
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• v.8 no.1 s.11
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• pp.23-27
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• 1999

This study was conducted to investigated the feasibility of using a fused borate rod for the remedial treatment, using pine specimens decayed by Tyromyces palustris and Gloeophyllum trabeum. The borate rod appears to be a useful remedial product for eliminating as well as preventing decay. However, the easiness of retention gradient of boron according to the distance from a rod treatment site, is required for more effective treatment. The effect of the extension of diffusion period and rod size on retention gradient of boron should be fully investigated for successful remedial treatments using borate rod.

• Journal of the Korean Society of Propulsion Engineers
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• v.3 no.3
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• pp.25-30
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• 1999

An experimental investigation was conducted to explore the effects of air mass flux on the combustion efficiency and particle size distributions in a solid fuel ramjet using a fuel grain highly loaded with boron carbide. Particle distributions were measured at the grain exit and at the nozz1e entrance using a Malvern 2600 HSD. Combustion efficiency increased with decreasing air mass flux. In general, the particle distribution was trimodal or quadrimodal with node peaks at approximately 4, 15, and 25$\mu\textrm{m}$ and possibly one at less than 2$\mu\textrm{m}$. The larger particles were the result of surface agglomeration, primarily within the recirculation region. Higher inlet air temperature produced higher combustion efficiencies, apparently the result of enhanced combustion of the larger boron carbide particles that burn in a diffusion controlled regime.

• Proceedings of the KWS Conference
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• 2009.11a
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• pp.60-60
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• 2009

본 연구는 보론이 첨가된 저합금강 용접 열영향부에서의 보론 편석 거동 연구를 위해 보론이 10ppm 첨가된 저합금강을 이용하여 다양한 용접 입열량 및 외부 응력에 따른 용접부 CGHAZ의 보론 편석거동을 분석하였다. 이를 위해 Gleeble 시스템을 이용하여 다양한 입열량에 따른 CGHAZ를 열 및 열-응력 사이클을 통하여 재현하였다. 재현된 시편의 미세조직은 OM을 통하여 분석하고, 보론의 편석거동을 SIMS와 PTA 분석법을 통하여 분석하였다. 그 결과 입열량에 따른 보론의 편석 거동은 최초 입열량이 증가함에 따라 보론의 편석이 증가하다가 다시 감소하였는데 이는 비평형 편석 후 고온에서 유지시간이 길어짐에 따라 back diffusion 발생에 따른 영향으로 판단된다. 또한 외부 응력에 의한 보론 편석 거동 분석 결과, 용접 열 사이클 중 작용하는 외부 응력에 의해 결정립계 편석 감소하였는데 이는 외부 응력에 의한 오스테나이트 결정립 크기 감소에 따른 결정립계 증가의 영향으로 판단된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.319-319
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• 2012

현재 폭넓게 이용되고 있는 STI (Shallow Trench Isolation) 공정에서 active edge 부분에 발생하는 기생 transistor의 subthreshold hump 특성을 제어하는 연구가 활발히 이루어지고 있다. 일반적으로 STI 공정을 이용하는 MOSFET에서 active edge 부분의 얇게 형성된 gate oxide, sharp한 active edge 형성, STI gap-fill 공정 중에 생기는 channel dopant out-diffusion은 subthreshold hump 특성의 주된 요인이다. 이와 같은 문제점을 해결하기 위해 active edge rounding process와 channel dopant compensation의 implantation을 이용하여 subthresold hump 특성 개선을 연구하였다. 본 연구는 STI 공정에 필요한 wafer와 phosphorus를 함유한 wafer를 한 chamber 안에서 auto-doping하는 방법을 이용하여 subthresold hump 특성을 구현하였다. phosphorus를 함유한 wafer에서 빠져나온 phosphorus가 STI 공정중인 wafer로 침투하여, active edge 부분의 channel dopant인 boron 농도를 상대적으로 낮춰 active edge 부분의 가 감소하고 leakage current를 증가시킨다. transistor의 channel length, gate width이고, wafer#No가 클수록 phosphorous를 함유한 wafer까지의 거리는 가까워진다. wafer #01은 hump 특성이 없고, wafer#20은 에서 심한 subthreshold hump 특성을 보였다. channel length 고정, gate width를 ~으로 가변하여 width에 따른 영향을 실험하였다. active 부분에 대한 SCM image로 확인된 phosphorus에 의한 active edge 부분의 boron 농도 감소와 gate width vs curve에서 확인된 phosphorus에 의한 감소가 narrow width로 갈수록 커짐을 확인하였다.