• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.55-60
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• 2014

For an high speed communication, a 40GHz VCO was implemented using a 0.11um standard CMOS technology. The mm-wave VCO was designed by a LC type using a spiral inductor, and a simplified architecture with buffers and a smart biasing technique were used to get a high performance. The frequency range of the proposed VCO is 34~40GHz which is suitable for mm-Wave communication system. It has an output power of -16dBm and 16% tuning range. And the phase noise is -100.33dBc/Hz at 1MHz offset at 38GHz fundamental frequency. The total power consumption of VCO including PADs is 16.8mW with 1.2V supply voltage. The VCO achieves the FOMT of -183.8dBc/Hz which is better than previous VOCs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.7
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• pp.23-29
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• 2012

The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.2
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• pp.183-188
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• 2014

In this paper, the propagation effect of power supply uncertainty on the output of class-F power amplifier has been estimated. Also, a 1.9 GHz, 10 watt class-F power amplifier was measured to verify the estimation and to find the optimal biasing point. By approximating the propagation theory of uncertainties, the propagation effect of bias uncertainty was mathmatically calculated. As a result, the DC biases have propagated uncertainties of 15~70 mW. However, at the optimized bias point, the uncertainty in the output power could be dropped less than 15 mW while the output power has dropped by 0.37 dB.

• Journal of Navigation and Port Research
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• v.27 no.2
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• pp.217-221
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• 2003

In this work, we used a novel RF-CSP to develop a broadband amplifier MMIC, including all the matching and biasing components, for Ku and K band applications. By utilizing an ACF for the RF-CSP, the fabrication process for the packaged amplifier MMIC could be simplified and made cost effective. STO (SrTiO$_3$) capacitors were employed to integrate the DC biasing components on the MMIC. A pre-matching technique was used for the gate input and drain output of the FETs to achieve a broadband design for the amplifier MMIC. The amplifier CSP MMIC exhibited good RF performance (Gain of 12.5$\pm$1.5 dB, return loss less than -6 dB, PldB of 18.5$\pm$1.5 dBm) over a wide frequency range. This work is the first report of a fully integrated CSP amplifier MMIC successfully operating in the Ku/K band.

• Journal of the Korean Magnetics Society
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• v.13 no.4
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• pp.176-181
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• 2003

The magnetic domain walls at the edges of a large patterned and exchanged-biased NiO(10-60 nm)/NiFe(10 nm) bilayers and their motions with applied field were investigated by magnetic force microscopy. Three kinds of domain walls, namely, head-to-head zig-zag and tail-to-tail zig-zag Bloch walls and straight Neel walls were found at specific edges of the unidirectional biased NiO(30 nm)/NiFe(10 nm) bilayer having the exchange biasing field (H$\sub$ex/) of 21 Oe. No walls were observed for the strong exchange-biased bilayer (60 nm NiO, H$\sub$ex/ = 75 Oe), while the amplitude of the zig-zag domain increased with decreasing exchange biasing. This may be explained by mutual restraint between H$\sub$ex/ and the demagnetization field of edge. We similarly investigated the magnetization reversal process, the subsequent motion of the walls and identified the pinning and nucleation sites during reversal.

• Journal of Science Education
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• v.45 no.2
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• pp.219-230
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• 2021

In this study, we derived several formulas for magnetic fields and induced voltages in a parallel plate capacitor biased by DC voltages. The computer simulation based on the derived formulas reveals that the magnetic fields due to the displacement current fall within the range of 10^-10T to 10^-9T and thence the experiment for the displacement current is not possible because the magnetic field sensor used in Data Logger could measure the magnetic fields of above 10^-5T range. Contrary to this, the computer simulation confirms that the induced voltages in a toroidal coil due to the displacement current range measurable values of 0.002~0.021V. The results imply that the displacement current can be confirmed by measuring the induced voltages in a toroidal coil inserted into a parallel plate capacitor under DC biasing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.11
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• pp.2228-2237
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• 1994

This paper describes the development of a Ku-band ($12.25GHz\sim12.75GHz$) SSPA intended as a replacement for TWTAs used in communication satelite transponder. The power stage of the amplifier consists of tow intrmally matched 8W FET divices combined using the branch-line coupler. To operate this stage, the drive stage has been designed with intermally matched 2W, 4W, 8W FET and two medium power FETs. The entire amplifier is made up by a aluminum chassis housing both the RF circuit and the bias circuitry. A regrlator/sequencing circuitry is used for FET biasing. The amplifier results implemented in this way show $41\pm0.3dB$ small-signal gain, 15W saturation power, a typical two tone $IM_3=-21.5dBc$ with single carrier backed off 5dB from saturation, $2^*/dBmax$ AM/PM conversion, and $3.47\pm0.25nsec$ group delay.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.7A
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• pp.672-677
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• 2007

A novel method for stabilizing the bias of an Electro-Optic Mach-Zehnder modulator has been proposed and demonstrated to maximize the switching extinction ratio in burst mode packet traffic. By sampling and minimizing the off-level output power of the modulator, a high extinction optical gate switch in obtain regardless of the variation of the packet traffic density.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.791-794
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• 1998

This paper presents a constant gm input stagefor low-voltage rail-to-rail operational amplifier. A proposed scheme uses two current paths to keep sum of the biasing currents of the complimentary input pairs. The op amp was designed in a $0.8\mu\textrm{m},$ n-well CMOS, double-polysilicon and double-metal technology. This achieved in weak inversion. The circuit can operate in power supply voltage from 1.5V up to 3V. An open-loop gain, AV, was simulated as 84dB for 15pF load. An unit-gain frequency, fT was 10MHz.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.703-706
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• 1998

This paper presents an efficient substrate-bias generator(SBG)for low-power, high-density DRAM's The proposed SBG can supply stable voltage with switching the supply voltage of driving circuit, and it can substitude the small capacitance for the large capacitance. The charge pumping circuit of the SBG suffere no VT loss and is to be applicable to low-voltage DRAM's. Also it can reduce the power consumption to make VBB because of it's high pumping efficiency. Using biasing voltage with positive temperature coefficient, VBB level detecting circuit can detect constant value of VBB against temperature variation. VBB level during VBB maintaining period varies 0.19% and the power dissipation during this period is 0.16mw. Charge pumping circuit can make VBB level up to -1.47V using VCC-1.5V, and do charge pumping operation one and half faster than the conventional ones. The temperature dependency of the VBB level detecting circuit is 0.34%. Therefore the proposed SBG is expected to supply a stable VBB with less power consumption when it is used in low power DRAM's.