• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.9-9
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• 2010

In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.166-173
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• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.7
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• pp.569-574
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• 2007

In this paper, the reliability (NBTI degradation: ${\Delta}V_{th}$) and device characteristic of nano-scale PMOSFET with plasma nitrided oxide (PNO) is characterized in depth by comparing those with thermally nitrided oxide (TNO). PNO case shows the reduction of gate leakage current and interface state density compared to TNO with no change of the $I_{D.sat}\;vs.\;I_{OFF}$ characteristics. Gate oxide capacitance (Cox) of PNO is larger than TNO and it increases as the N concentration increases in PNO. PNO also shows the improvement of NBTI characteristics because the nitrogen peak layer is located near the $Poly/SiO_2$ interface. However, if the nitrogen concentration in PNO oxide increases, threshold voltage degradation $({\Delta}V_{th})$ becomes more degraded by NBT stress due to the enhanced generation of the fixed oxide charges.

• Electronic Materials Letters
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• v.14 no.6
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• pp.669-677
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• 2018

In this work, the high ${\kappa}$ $Zr_xAl_{1-x}O_y$ films with a different Zr concentration have been deposited by atomic layer deposition, and the effect of Zr concentrations on the structure, chemical composition, surface morphology and dielectric properties of $Zr_xAl_{1-x}O_y$ films is analyzed by Atomic force microscopy, X-ray diffraction, X-ray photoelectron spectroscopy and capacitance-frequency measurement. The effect of Zr concentrations of $Zr_xAl_{1-x}O_y$ gate insulator on the electrical property and stability under negative bias illumination stress (NBIS) or temperature stress (TS) of ZnSnO (ZTO) TFTs is firstly investigated. Under NBIS and TS, the much better stability of ZTO TFTs with $Zr_xAl_{1-x}O_y$ film as a gate insulator is due to the suppression of oxygen vacancy in ZTO channel layer and the decreased trap states originating from the Zr atom permeation at the $ZTO/Zr_xAl_{1-x}O_y$ interface. It provides a new strategy to fabricate the low consumption and high stability ZTO TFTs for application.

• Journal of Oriental Medical Thermology
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• v.5 no.1
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• pp.69-77
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• 2006

Purpose : There are many patients with cold hypersensitivity who want oriental medicine treatment. But there has been no study of acupucture treatment effect on patients. So we examined effects of acupuncture treatment at different acupuncture points and compared results of 1st cold stress test and 2nd cold stress test. Method : 8 patients with hand cold hypersensitivity applied for this study. To rule out an bias, we excluded the patients with skin diseases, spinal nerve disease of cervial spine, external wounds. We measured body temperature with D.I.T.I. We performed cold stress test(CST) by 6 thermographic observation using D.I.T.I ; the 1st was taken after 15 minutes-resting, the 2nd was immediately taken after 1 minute soak in $20^{\circ}C$ water, the 3rd was taken at 10 minutes after the soak, and after a week, the 4th was taken after 15 minutes resting, the 5th was immediately taken after 1 minute soak in $20^{\circ}C$ water, the 6th was taken after 10 minutes with acupunture treatment. There were two groups of patients. First group was acupuncture that performed acupuncture therapy on distal points. Second group was acupuncture that performed acupuncture therapy on proximal points. We compared first CST and second CST recovery rate result. Results : The recovery rate at distal points acupuncture therapy was higher than before of that. but not significantly different. The recovery rate at proximal points acupuncture therapy was significantly higher than before of that. The recovery rate of both the back, the palms, all fingers of after proximal acupuncture therapy was significantly higher than before of that. Conclusions : Acupuncture could be effective therapy method on cold hypersensitivity, especially using proximal acupuncture points could be good at cold hypersensitivity patients. This was pilot study of very small samples, results had limitations. For further results more examine would be needed.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.9-15
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• 2004

We investigated the electrical properties of copolymer low-k materials that are compromised of the PMSSQ(Poly Methyl Silsesquioxane)-based matrix with the BTMSE (Bis Tri Methoxy Silyl Ethane) additives. We manufactured MIS-type test samples using the copolymer as the insulator and measured their leakage current and failure time by means of the BTS (bias-temperature-stress) test. The failure time was observed to decrease drastically when the porosity of the copolymer was increased over $30\%$. From the measurement of failure time with respect to temperature. the activation energy of Cu drift through the copolymer was calculated to be 1.51 eV.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.2
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• pp.23-30
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• 2012

This paper proposes a novel adaptive header-based power gating structure to compensate for the performance loss and the increased wake-up time of the power gating structures induced by the negative bias temperature instability (NBTI) effect. The proposed structure consists of variable width footers based on the two-pass power gating and a new NBTI sensing circuit for an adaptive control. The simulation results of the proposed structure are compared to those of power gating without the adaptive control and show that both the circuit-delay and wake-up time dependence of the power gating structure on the NBTI stress is minimized with only 3% and 4% increase, respectively while keeping small leakage power and rush-current. In this paper, a 45 nm CMOS technology and predictive NBTI model have been used to implement the proposed circuits.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.89-98
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• 2003

The electrical and mechanical properties of sputtered Cu(Mg) films are investigated for highly reliable interconnects. The roughness, adhesion, hardness and resistance to thermal stress of Cu(Mg) film annealed in vacuum at $400^{\circ}C$ for 30min were improved than those of pure Cu film. Moreover, the flat band voltage(V$_{F}$ ) shift in the Capacitance-Voltage(C-V) curve upon bias temperature stressing(BTS) was not observed and leakage currents of Cu(Mg) into $SiO_2$ were three times less than those of pure Cu. Because Mg was easy to react with oxide than Cu and Si after annealing, the Mg Oxide which formed at surface and interface served as a passivation layer as well.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.55-55
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• 2018

Recently, amorphous oxides such as InGaZnO (IGZO) and InZnO (IZO) as a channel layer of an oxide TFT have been attracted by advantages such as high mobility, good uniformity, and high transparency. In order to apply such an amorphous oxide TFTs to a display, the stability in various environments must be ensured. In the InGaZnO which has been studied in the past, Ga elements act as a suppressor of oxygen vacancy and result in a decreased mobility at the same time. Previous studies have been showed that the InZnO, which does not contain Ga, can achieve high mobility, but has relatively poor stability under various instability environments. In this study, the TFTs using $IZO/Al_2O_3$ double layer structure were studied. The introduction of an $Al_2O_3$ interlayer between source/drain and channel causes superior electrical characteristics and electrical stability as well as reduced contact resistance with optimally perfect ohmic contact. For the IZO and $Al_2O_3$ bilayer structures, the IZO 30nm IZO channels were prepared at $Ar:O_2=30:1$ by sputtering and the $Al_2O_3$ interlayer were depostied with various thickness by ALD at $150^{\circ}C$. The optimal sample exhibits considerably good TFT performance with $V_{th}$ of -3.3V and field effect mobility of $19.25cm^2/Vs$, and reduced $V_{th}$ shift under positive bias stress stability, compared to conventional IZO TFT. The enhanced TFT performances are closely related to the nice ohmic contact properties coming from the defect passivation of the IZO surface inducing charge traps, and we will provide the detail mechanism and model via electrical analysis and transmission line method.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.356-356
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• 2010

Tribological behaviors of the hard film on soft substrate system were explored using the hard thin film of diamond-like carbon (DLC) coated the soft polymer of polydimethysiloxane (PDMS). A DLC film with the Young's modulus of 100 GPa was coated on PDMS substrate with Young's modulus of 10 MPa using plasma enhanced chemical vapor deposition (PECVD) technique. The deposition time was varied from 10 sec to 10 min, resulting in nanoscale roughness of wrinkle patterns with the thickness of 20 nm to 510 nm, respectively, at a bias voltage of $400\;V_b$, working pressure 10 mTorr. Nanoscale wrinkle patterns with 20-100 nm in width and 10-30 nm height were formed on DLC coating due to the residual stress in compression and difference in Young's modulus. Nanoscale roughness effect on tribological behaviors was observed by performing a tribo-experiment using the ball-on-disk type tribometer with a steel ball of 6 mm in diameter at the sliding speed of 220 rpm, normal load of 1N and 25% humidity at ambient temperature of $25^{\circ}C$. Friction force were measured with respect to thickness change of coated DLC thin film on PDMS. It was found that with increases the thickness of DLC coating on PDMS, the coefficient of friction decreased by comparison to that of the uncoated PDMS. The wear tracks before and after tribo-test were analyzed using SEM and AFM.