• 제목/요약/키워드: avalanche breakdown

검색결과 36건 처리시간 0.026초

Short Channel n-MOSFET의 Breakdown 전압

  • 김광수;이진효
    • ETRI Journal
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    • 제9권1호
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    • pp.118-124
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    • 1987
  • Short channel n-MOSFET의 드레인-소오스 사이의 breakdown은 단순한 접합 breakdown이 아닌 avalanche-induced breakdown으로 p-MOSFET, long channel n-MOSFET의 breakdown 전압보다 훨씬 작은 값을 갖는다. Short channel n-MOSFET의 breakdown의 특징은 current-controlled 부저항 특성(snapback)이 나타나고, 게이트 전압에 따라 breakdown 전압보다 작은 sustainning 전압이 존재한다. 이와 같은 sustainning 전압은 short channel n-MOSFET의 안정한 동작에 또 하나의 제한 요소가 될 수 있다. 따라서 공정 및 회로 시뮬레이션을 위해, short channel n-MOSFET의 avalanche breakdown 현상에 대한 정확한 분석이 요구된다. Short channel n -MOSFET의 avalanche breakdown 현상을 분석하기 위해서Parasitic bipolar transistor를 도입한 분석적 모델을 이용하였다.

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극히 얕은 $N^+$-P 실리콘 접합에서의 어발런치 현상 (Avalanche Phenomenon at The Ultra Shallow $N^+$-P Silicon Junctions)

  • 이정용
    • 반도체디스플레이기술학회지
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    • 제6권3호
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    • pp.47-53
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    • 2007
  • Ultra thin Si p-n junctions shallower than $300{\AA}$ were fabricated and biased to the avalanche regime. The ultra thin junctions were fabricated to be parallel to the surface and exposed to the surface without $SiO_2$ layer. Those junctions emitted white light and electrons when junctions were biased in the avalanche breakdown regime. Therefore, we could observe the avalanche breakdown region visually. We could also observe the influence of electric field to the current flow visually by observing the white light which correspond to the avalanche breakdown region. Arrayed diodes emit light and electrons uniformly at the diode area. But, the reverse leakage current were larger than those of ordinary diodes, and the breakdown voltage were less than 10V.

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Asymmetric 및 Symmetric MOSFET 소자의 Drain Breakdown 특성 분석

  • 최평호;김상섭;최병덕
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.232.2-232.2
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    • 2013
  • 본 연구에서는 asymmetric과 symmetric MOSFET 소자의 drain breakdown 및 snapback 특성을 분석하였다. 실험에서는 두 MOSFET 소자의 동작 영역에서 게이트와 드레인에 각각 전압을 인가하였다. 드레인 전류-전압 곡선으로 부터 drain breakdown 전압과 snapback 전압을 추출하였다. 결과 avalanche breakdown 발생 전의 드레인 전류는 asymmetric 구조의 경우 더 작은 값을 보였으며 이는 asymmetric 구조에서의 drain field 가 더 낮기 때문이다. 따라서 impact ionization은 asymmetric 구조에서 덜 발생하며, snapback 전압은 avalanche breakdown voltage가 작은 asymmetric 구조에서 크게 나타났다.

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전극표면상 미소돌기의 극성에 의한 압축 $SF_6$ 개스의 절연파괴 Mechanism에 관한 연구 (A Study on the Breakdown Mechanism of Compressed $SF_6$ by Polarity of a Protrusion on Electrode Surface)

  • 이동인;이광식;김인식
    • 대한전기학회논문지
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    • 제39권9호
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    • pp.956-963
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    • 1990
  • The general shapes of prebreakdown pulses in a discharge gap were calculated and the current pulses due to avalanche were detected in SF6 by changing the polarity of the protrusion placed on an electrode at pressures up to about 400 Kpa. The mathematical model of prebreakdown pulse development with a negative protrusion shows agreement with the observed pulses. No evidence of intense bursts of field-emitted electrons was observed. Breakdown probably results from a single avalanche developing to a critical size. However the calculated shape of prebreakdown current pulse does not agree with the observed pulses with a positive protrusion. The breakdown is preceded by multiple avalanche development at pressures less than about 200 Kpa. This observation has been interpreted as due to the formation of negative ions following photoionization in the gas which drift into the critical volume near a positive protrusion.

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경계항복 억제를 위한 평판형 InP/InGaAs 애벌랜치 포토다이오드의 곡률 효과 분석 (Investigation of Curvature Effect on Planar InP/InGaAs Avalanche Photodiodes for Edge Breakdown Suppression)

  • 이봉용;정지훈;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.206-209
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    • 2002
  • With the progress of semiconductor processing technology, avalanohe photodiodes (APDs) based on InP/InGaAs are used for high-speed optical receiver modules. Planar-type APDs give higher reliability than mesa-type APDs. However, Planar-type APDs are struggled with a problem of intensed electric field at the junction curvature, which causes edge breakdown phenomena at the junction periphery. In this paper, we focused on studying the effects of junction curvature for APDs performances by different etching processes followed by single diffusion to from p-n junction. The performance of each process is characterized by observing electric field profiles and carrier generation rates. From the results, it can be understood to predict the optimum structure, which can minimize edge breakdown and improve the manufacturability.

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Optimization of charge and multiplication layers of 20-Gbps InGaAs/InAlAs avalanche photodiode

  • Sim, Jae-Sik;Kim, Kisoo;Song, Minje;Kim, Sungil;Song, Minhyup
    • ETRI Journal
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    • 제43권5호
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    • pp.916-922
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    • 2021
  • We calculated the correlation between the doping concentration of the charge layer and the multiplication layer for separate absorption, grading, charge, and multiplication InGaAs/InAlAs avalanche photodiodes (APDs). For this purpose, a predictable program was developed according to the concentration and thickness of the charge layer and the multiplication layer. We also optimized the design, fabrication, and characteristics of an APD for 20 Gbps application. The punch-through voltage and breakdown voltage of the fabricated device were 10 V and 33 V, respectively, and it was confirmed that these almost matched the designed values. The 3-dB bandwidth of the APD was 10.4 GHz, and the bit rate was approximately 20.8 Gbps.

Analysis of Flat-Band-Voltage Dependent Breakdown Voltage for 10 nm Double Gate MOSFET

  • Jung, Hakkee;Dimitrijev, Sima
    • Journal of information and communication convergence engineering
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    • 제16권1호
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    • pp.43-47
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    • 2018
  • The existing modeling of avalanche dominated breakdown in double gate MOSFETs (DGMOSFETs) is not relevant for 10 nm gate lengths, because the avalanche mechanism does not occur when the channel length approaches the carrier scattering length. This paper focuses on the punch through mechanism to analyze the breakdown characteristics in 10 nm DGMOSFETs. The analysis is based on an analytical model for the thermionic-emission and tunneling currents, which is based on two-dimensional distributions of the electric potential, obtained from the Poisson equation, and the Wentzel-Kramers-Brillouin (WKB) approximation for the tunneling probability. The analysis shows that corresponding flat-band-voltage for fixed threshold voltage has a significant impact on the breakdown voltage. To investigate ambiguousness of number of dopants in channel, we compared breakdown voltages of high doping and undoped DGMOSFET and show undoped DGMOSFET is more realistic due to simple flat-band-voltage shift. Given that the flat-band-voltage is a process dependent parameter, the new model can be used to quantify the impact of process-parameter fluctuations on the breakdown voltage.

절연 바니시의 전기적특성 (Electrical Properties of Insulating Varnish)

  • 김정훈;신종열;변두균;이종필;조경순;김왕곤;홍진웅
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.299-302
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    • 2001
  • In this study, we are studied the electrical conduction and dielectric breakdown properties of insulating varnish. In order to analyze the molecular structure and physical properties of insulating varnishs, FT-lR was used. As the result, it can be confirmed that the peak of alcoholic group appeared in wavenumbers 3452[cm$\^$-1], the peak of =CH appeared in 3080[cm$\^$-1] and the peak of -CH appeared in 2919[cm$\^$-1] respectively. The following results were obtained from electrical properties of insulating varnish. The amplitude of current density was decreased by thickness increasing and the current density was effected by the thermal energy from external due to temperature increasing. In study temperature dependence of dielectric strength, the specimen of 10[$\mu\textrm{m}$] thickness was measurement from room temperature to 180[$^{\circ}C$]. It is confirmed that the temperature regions below 60[$^{\circ}C$] is due to electron avalanche breakdown and the temperature regions over 60[$^{\circ}C$] is due to free volume breakdown which makes electron movements easy.

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고전압 정전기 보호용 DDDNMOS 소자의 더블 스냅백 방지를 위한 최적의 이온주입 조건 결정 (Determination of optimal ion implantation conditions to prevent double snapback of high voltage operating DDDNMOS device for ESD protection)

  • 서용진
    • 전기전자학회논문지
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    • 제26권3호
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    • pp.333-340
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    • 2022
  • 고전압용 정전기 보호소자인 DDDNMOS(double diffused drain N-type MOSFET) 소자의 더블 스냅백 방지를 위한 최적의 이온주입 조건을 결정하기 위해 공정 및 소자 시뮬레이션이 수행되었다. HP-Well, N- 드리프트 및 N+ 드레인 이온주입량의 변화가 더블 스냅백 및 애발란치 브레이크다운 전압에 미치는 영향을 고찰함으로써 더블 스냅백을 방지하여 정전기 보호 성능 개선할 수 있었다. HP-Well 영역보다는 N- 드리프트 영역의 이온주입 농도를 최적으로 설계할 경우, 1차 on 상태에서 2차 on 상태로 전이하는 것을 막아주므로 비교적 양호한 정전기 보호 성능을 얻을 수 있었다. 또한 드리프트 이온주입 농도는 누설전류 및 애발란치 브레이크다운 전압에도 영향을 미치므로 동작전압이 30V보다 큰 공정기술에서는 DPS와 같은 새로운 구조를 적용하거나, 대안으로 여러 공정 변수들을 종합(colligation)하여 적용할 경우 향상된 정전기 보호 성능을 실현할 수 있을 것이다.

에폭시 복합체의 절연신뢰도 및 파괴수명 예측 (Prediction of Insulation Reliability and Breakdown Life in Epoxy Composites)

  • 신철기;박건호;왕종배;김성역;이준웅
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1996년도 추계학술대회 논문집
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    • pp.260-264
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    • 1996
  • In this study, the dieiectric breakdown of epoxy composites used for transformers was experimented and then its data were simulated by Weibull distribution probability . As a result. first of all, speaking of dielectric breakdown properties, the more hardener increased the stronger breakdown strength at low temperature, and the breakdown strength of specimens because it is believed that the adding filler farms interface and charge is accumulated in it, therefore the molecular motility is raised, the electric field is concentrated, and the acceleration of electron and the growth of electron avalanche are early accomplished. In the case of filled specimens with treating silane, the breakdown strength become much higher since the suggests that silane coupling agent improves interfacial combination and relays electric field concentration. Finally, from the analysis 7f weibull distribution. it was confirmed that as the allowed breakdown probability was given by 0.11[%].

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