• The KIPS Transactions:PartC
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• v.8C no.4
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• pp.405-414
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• 2001

전력연구원에서는 ATM WAN 통합망 기반 구축을 통하여 통신회선 임대비용의 절감과 안정적이고 고속의 인터넷 서비스를 수용함으로써 통신망의 경쟁력을 확보하는 것을 목표로 ATM 기반 전력통신망을 설계하였다. 이를 위하여 기존의 패킷 통신망 트래픽 통계 분석결과와 연간 트래픽 증가량 예측치를 기반으로 향후 서비스 수용계획을 고려한 토폴로지와 링크용량을 설계하였으며, 이를 바탕으로 전력통신망에서의 ATM 스위치 기반 네트워크 모델을 확립하였다. 본 논문에서는 ATM 기반 전력통신망의 설계결과를 요약한다.

• English Language & Literature Teaching
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• v.10 no.1
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• pp.127-152
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• 2004

The purpose of this study is to elaborate design strategies for a Web-based self-directed cooperative distance language learning community. Research was done regarding the theoretical foundations for self-directed cooperative language learning and Web-based learning communities. The components of a Web-based community for self-directed cooperative language learning system are also investigated. As a result of this study, design strategies for Web-based communities are suggested. There are performance and supporting environments(synchronous/asynchronous) for self- directed cooperative language learning. There are also cultural experiences and communication factors in the performance field. Furthermore, matching communicators, finding and offering information, language learning content and other supporting agents are important in the supporting environment.

• Journal of KIISE:Software and Applications
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• v.26 no.2
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• pp.325-325
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• 1999

This paper presents a locally deterministic abstract machine for a new process model LocPi which is based on a subset of asynchronous polyadic π-calculus and enriched with locations and process mobility. Our calculus has a primitive for migrating and spawning a process to a location(remote site), but does not explicitly represent the place which a process are running at. Running processes may have names attached with their locations and the communication reductions can occur only on located names. So we present how to assign locations to unlocated names. Without a global channel environment, these located names enable us to locate the place which input actions occur at and output messages should be sent to.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.127-130
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• 2000

In this paper, we design the robust H$_{\infty}$ controller for congestion control in ATM (asynchronous transfer mode) networks with the variation of other higher priority sources(e.g., constant bit rate, variable bit rate). Since ABR (available bit rate) sources share the bottleneck node with other higher priority sources, we design the controller which guarantees robustness against time delay and disturbance. The proposed robust H$_{\infty}$ controller with regional pole placements can minimize the variation of the queue size at the predefined desired level. And we also show its robustness through simulation for the ATM networks with time delay and disturbance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.11C
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• pp.1102-1110
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• 2007

In this paper, we design the FPGA (Field-Programmable Gate Array) of the CAMB (Constant-Amplitude Multi-code Biorthogonal) modulation, and implement the SoC (System on Chip). The ASIC (Application Specific Integrated Circuit) chip is be implemented through targeting and board test. This 12Mbps modem SoC includes the ARM (Advanced RISC Machine)7TDMI, 64Kbyte SRAM(Static Random Access Memory) and ADC (Analog to Digital Converter)/DAC (Digital to Analog Converter) for flexible applications. Additionally, the modem SoC can support the variable communication interfaces such as the 16-bits PCMCIA (Personal Computer Memory Card International Association), USB (Universal Serial Bus) 1.1, and 16C550 Compatible UART (Universal Asynchronous Receiver/Transmitter).

• Journal of Korea Multimedia Society
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• v.6 no.6
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• pp.1100-1110
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• 2003

Design and implementation of remote procedure cail (RPC) resource service system based on the XML considering the request delegation between the servers are described for the resource application and efficient processing of distributed environment. For this purpose, the request information about several server, which would be used by client, is encoded into XML document based on XML-DOM and transferred to server. Server classifies the client requests using objects which can deal with the XMLL-DOM. For the request delegation between the servers, server saves the request result of client in XMLL-DOM structure without replying it immediately, and makes the client request delegated to another server in XML-DOM's request information. In addition, the resource repository are managed for resource transparency of distributed environment. As a result, resource application and processing efficiency are improved by reduction of response time caused by integration of RPC and XML-RPC services and request delegation between the servers. Extension of asynchronous and average blocking time of client were reduced and information of resource which can be used by client was offered.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.1917-1926
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• 2018

In view of the current state of the reserves of electric energy generated resources and the share of electric motors in electricity consumption, many researches and studies related to efficiency in electric motors are being made. The presented work is related to the Axial Flux Permanent Magnet Synchronous Motor (AF-PMSM), which has recently undergone significant work based on the development of magnet and motor technology. In this study, a novel AF-PMSM was designed analytically through Finite Element Method (FEM) which can be started by connecting to a line such as an asynchronous motor in a transient state and can operate with high efficiency and power factor after synchronization in steady state without the need for an expensive motor drive. According to the obtained FEM results, a design with an efficiency class of IE4 of 5.5 kW shaft power, a 4 poles motor was obtained. As a result, economic calculations indicate that the extra cost of the designed Line start AF-PMSM with respect to the asynchronous motor is rapidly compensated by energy saving due to a more efficient operation, especially constant speed operations. As a result of the analysis obtained, the targeted values are reached. For induction motors and radial flux permanent magnet synchronous motors, a good alternative motor that can operate with high efficiency and power factor has been obtained.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.12
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• pp.2366-2373
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• 2007

In this paper, a low-power and small-area asynchronous 1 kilobit EEPROM for passive UHF RFID tag chips is designed with $0.18{\mu}m$ EEPROM cells. As small area solutions, command and address buffers are removed since we design asynchronous I/O interface and data output buffer is also removed by using separate I/O. To supply stably high voltages VPP and VPPL used in the cell array from low voltage VDD, Dickson charge pump is designed with schottky diodes instead of a PN junction diodes. On that account, we can decrease the number of stages of the charge pump, which can decrease layout area of charge pump. As a low-power solution, we can reduce write current by using the proposed VPPL power switching circuit which selects each needed voltage at either program or write mode. A test chip of asynchronous 1 kilobit EEPROM is fabricated, and its layout area is $554.8{\times}306.9{\mu}m2$., 11% smaller than its synchronous counterpart.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.22-30
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• 2009

Due to high levels of integration and complexity, the Network-on-Chip (NoC) approach has emerged as a new design paradigm to overcome on-chip communication issues and data bandwidth limits in conventional SoC(System-on-Chip) design. In particular, exponentially growing of energy consumption caused by high frequency, synchronization and distributing a single global clock signal throughout the chip have become major design bottlenecks. To deal with these issues, a globally asynchronous, locally synchronous (GALS) design combined with low power techniques is considered. Such a design style fits nicely with the concept of voltage-frequency-islands (VFI) which has been recently introduced for achieving fine-grain system-level power management. In this paper, we propose an efficient design methodology that minimizes energy consumption by VFI partitioning on an NoC architecture as well as assigning supply and threshold voltage levels to each VFI. The proposed algorithm which find VFI and appropriate core (or processing element) supply voltage consists of traffic-aware core graph partitioning, communication contention delay-aware tile mapping, power variation-aware core dynamic voltage scaling (DVS), power efficient VFI merging and voltage update on the VFIs Simulation results show that average 10.3% improvement in energy consumption compared to other existing works.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.87-90
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• 1998

Many recent studies have been conducted involving the transport of constant and variable bit rate MPEG-2 video in asynchronous transfer mode (ATM) networks. In this study, the traffic control of supporting MPEG-2 video communications in ATM networks under unloaded or loaded network conditions, in which the generated traffic sources are bursty in nature, are considered. We analyse about MPEG-2 traffic and design a model, which makes use of the ATM OAM funcation in order to support the traffic control functions. To implement the model, we propose a scheme, which combines the performance management OAM function and the bandwidth allocation function. Especially, we design this scheme to control the VBR (Variable Bit Rate)MPEG-2 video traffic.