• Title/Summary/Keyword: asynchronous

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Fault Diagnosis and Tolerance for Asynchronous Counters with Critical Races Caused by Total Ionizing Dose in Space (우주 방사능 누적에 의한 크리티컬 레이스가 존재하는 비동기 카운터를 위한 고장 탐지 및 극복)

  • Kwak, Seong-Woo;Yang, Jung-Min
    • Journal of the Korean Institute of Intelligent Systems
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    • v.22 no.1
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    • pp.49-55
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    • 2012
  • Asynchronous counters, where the counter value is changed not by a synchronizing clock but by outer inputs, are used in various modern digital systems such as spaceborne electronics. In this paper, we propose a scheme of fault tolerance for asynchronous counters with critical races caused by total ionizing dose (TID) in space. As a typical design flaw of asynchronous digital circuits, critical races cause an asynchronous circuit to show non-deterministic behavior, i.e., the next stable state of a state transition is not a fixed value but may be any value of a state set. Using the corrective control scheme for asynchronous sequential machines, this paper provides an existence condition and design procedure for a state feedback controller that can invalidate the effect of critical races. We implement the proposed control system in VHDL code and conduct experiments to demonstrate that the proposed control system can overcome critical races.

A synchronized processing algorithm of asynchronous data with trigger (트리거를 이용한 비동기 데이터의 동기화 처리 알고리즘 연구)

  • 박성진;유지상
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.1002-1008
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    • 2003
  • In terrestrial data broadcasting, we are just on the beginning stage in all aspects including implementation and design techniques and only asynchronous data processing has been receiving a little study. In this paper, we therefore propose an efficient processing algorithm for synchronization of asynchronous data by using trigger information to make more diverse service possible with a variety of contents. In the proposed algorithm, trigger data is encapsulated in DSM-CC section and transmitted in a form of MPEG-2 TS. The data is then separated in PC type set-top box and detached asynchronous data and trigger data are stored by the proposed algorithm. Pre-loaded asynchronous data is displayed when STC(system time clock) has the same value as PTS(presentation time stamp). Proper operation of the proposed algorithm was verified by using a content of asynchronous data with extensible markup language(XML) and a declarative application(DA) browser.

The Effect of Online Blended Learning Application on Occupational Therapy Students' Satisfaction and Academic Achievement in Non-Face-to-Face Classes (비대면 수업에서 온라인 블렌디드 러닝 적용이 작업치료과 대학생의 수업만족도와 학업성취도에 미치는 영향)

  • Park, Ju-Young;Kim, Hun-Ju
    • Journal of The Korean Society of Integrative Medicine
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    • v.9 no.2
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    • pp.53-61
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    • 2021
  • Purpose : The purpose of this study is to explore the effectiveness of online blended learning(asynchronous online learning class 1+synchronous online learning class 2) method and discuss the applicability of online blended learning. In this study, we will analyze the differences in class satisfaction and academic achievement between asynchronous online learning and online blended learning classes, and discuss the strengths, weaknesses, and satisfactions of online blended learning. Methods : The subjects of this study were 39 of the occupational therapy students who took the 'child development' course. Asynchronous online learning class was applied for 1-6 weeks and online blended learning was applied for 9~14 weeks. The online blended learning class consisted of 1 hours synchronous online learning and 2 hours asynchronous online learning. For the asynchronous online learning, the screen recording program of OBS Studio was used, and for the synchronous online learning, the Zoom program was used. The results of course evaluation and academic achievement of students according to the type of lecture were compared, and a survey was conducted on the satisfaction of online blended learning. Results : The results of this study are as follows. First, satisfaction(A class: t=-4.19, p=.001, B class: t=-7.94, p=.00) with online blended learning classes was significantly higher than asynchronous online learning. Second, when applying online blended learning class, academic achievement(t=-10.58, p=.00) was significantly higher. Third, the online blended learning class showed the highest satisfaction in improving the interest in the subject, and it was found to be helpful in online class management, professor-student interaction, and class content understanding. Conclusion : We have found that online blended learning can compensate for the shortcomings of online lectures and increase the quality of the lectures and the satisfaction of students. The application of online blended learning should be supplemented according to the characteristics of each class, and I hope that blended online teaching methods can be developed based on new ideas in the future.

Real time orbit estimation using asynchronous multiple RADAR data fusion (비동기 다중 레이더 융합을 통한 실시간 궤도 추정 알고리즘)

  • Song, Ha-Ryong;Moon, Byoung-Jin;Cho, Dong-Hyun
    • Aerospace Engineering and Technology
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    • v.13 no.2
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    • pp.66-72
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    • 2014
  • This paper introduces an asynchronous multiple radar fusion algorithm for space object tracking. To estimate orbital motion of space object, a multiple radar scenario which jointly measures single object with different sampling time indices is described. STK/ODTK is utilized to determine realization of orbital motion and joint coverage of multiple radars. Then, asynchronous fusion algorithm is adapted to enhance the estimation performance of orbital motion during which multiple radars measure the same time instances. Monte-Carlo simulation results demonstrate that the proposed asynchronous multi-sensor fusion scheme better than single linearized Kalman filter in an aspect of root mean square error.

Systolic Design with Asynchronous Controls for Digital-Signal Processings (디지털 신호처리를 위한 비동기 제어 시스톨릭 설계)

  • 전문석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.3
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    • pp.410-424
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    • 1993
  • In this paper, we present new techniques for designing systolic arrya and asynchronous arrays for digital-signal processings. More specifically, we propose a systolic array with simple local interconnections which achieves optimal performance without having undesirable features such as preloading input data or global broadcasting. As asynchronous array for digital-signal processings, which can speed up the total computation time significantly is also which can speed up the total computation time significantly is also presented. The key component of the asynchronous array is a presented. The key component of the asynchronous array is a comunicaiton protocol which controls input data flow properly and efficiently. Finally, performance of the arrays is analyzed and a simulation using Occam programmed in a Transputer network is reported.

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Corrective Control of Asynchronous Sequential Machines for Tolerating Permanent Faults (교정 제어를 이용한 비동기 순차 머신의 영구 고장 극복)

  • Yang, Jung-Min
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.47 no.5
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    • pp.9-17
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    • 2010
  • Corrective control compensates the stable-state behavior of asynchronous sequential machines so that the closed-loop system can be changed in a desirable way. Using corrective control, we present a novel fault tolerance scheme that overcomes permanent faults for asynchronous sequential machines. When a permanent fault occurs to an asynchronous machine, the fault is not recovered forever while the machine is irreversibly stuck in a set of failure states. But, if the machine has control redundancy in the limited behavior range, corrective control can be applied to solve the fault tolerance problem against permanent faults. We present the condition on detecting permanent faults and the existence condition of an appropriate corrective controller. The design procedure for the proposed controller is described in a case study.

Modeling And Simulation of the Switching Time Calculation When Starts Asynchronous Motors using Matlab Software (비동기모터 기동시 Matlab을 이용한 스위칭시간 계산의 모델링 및 시뮬레이션)

  • Bae, Cherl-O;Vuong, Duc-Phuc
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2011.10a
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    • pp.73-73
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    • 2011
  • In fact, asynchronous motors are used widely. Asynchronous motors which have large power (compared to the source supplies) is needed to start them in various methods. The theory of application reduced voltage to motor's stator or variable resistor fed rotor for the purpose of altering the motor's torque and power consumption characteristics is an idea that has existed for many years. These concepts have flourished mainly due to the need to limit torque and limited generator/power distribution capabilities. However, how can know exactly the time of switching steps with different types of motors as well as load characteristics is very difficult. This paper focuses on the design and development mathematical models of motor[1][2], load, ACB, asynchronous machine and then is implemented in SIMULINK in order to calculate this time, special on ships where power generation station is limited. The simulation results are both compared and discussed in detail so that it can apply to conclude the most suitable and applicable starting time for new system with various motors and load.

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Instruction-level Power Model for Asynchronous Processor, A8051 (비동기식 프로세서 A8051의 명령어 레벨 소비 전력 모델)

  • Lee, Je-Hoon
    • The Journal of the Korea Contents Association
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    • v.12 no.7
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    • pp.11-20
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    • 2012
  • This paper presents new instruction-level power model for an asynchronous processor, A8051. Even though the proposed model estimates power consumption as instruction level, this model reflects the behavioral features of asynchronous pipeline during the program is executed. Thus, it can effectively enhance the accuracy of power model for an asynchronous embedded processor without significant complexity of power model as well as the increase of simulation time. The proposed power model is based on the implementation of A8051 to reflect the characteristics of power consumption in A8051. The simulation results of the proposed model is compared with that of gate-level synthesized A8051. The proposed power model shows the accuracy of 94% and the simulation time for estimation the power consumption was reduced to 1,600 times.

Array Structure for Asynchronous Low Power Multiplier (저전력 비동기 곱셈기를 위한 배열 구조)

  • 박찬호;최병수;이동익
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.141-144
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    • 2000
  • In this paper, a new parallel array structure for the asynchronous array multiplier is introduced. This structure is designed for a data dependent asynchronous multiplier to reduces power which is wasted in conventional array structure. Simulation shows that this structure saves 30% of power and 55% of computation time comparing to conventional booth encoded array multiplier.

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A Static Latched DCVSL Circuits for Asynchronous Pipeline Scheme (비동기 파이프라인 구조를 위한 정적 래치 DCVSL 회로)

  • 김영우;김수원
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.759-762
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    • 1998
  • In this paper, a SL-DCVSL (static latched differential cascode voltage switch logic) circuit for the asynchronous pipeline is proposed. The proposed SL-DCVSL circuit is a slightly modified version of the DCVSL circuit, and used to improve the storage capability of the precharged functional blocks. The proposed SL-DCVSL has more robust storage characteristics compared to the conventional LDCVSL (latched DCVSL〔2〕). The operation of the proposed circuit is verified by simulating the asynchronous FIFO (First-In First-Out) structure.

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