• Industrial Engineering and Management Systems
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• v.2 no.1
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• pp.63-70
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• 2003

In this study, we employed an arithmetic process (AP) approach to resolve gearbox maintenance problems. The approach is realistic and direct in modelling the characteristics of a deteriorating system such as a gearbox since a decreasing AP can model a gearbox's successive operating times and an increasing AP can model the corresponding consecutive repair times. First of all, two test statistics were used to check whether the process is arithmetic or not. Next, model parameters of the AP were estimated using the simple linear regression method. Finally, the optimal replacement policy based on minimising the long-run average cost per day was determined for each type of gearbox.

• Education of Primary School Mathematics
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• v.10 no.2
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• pp.141-149
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• 2007

It is undeniably important to bring up a solution capability of arithmetic word problems in the elementary mathematical education. The goal of this study is to acquire the implication for remedial instruction on arithmetic word problems solving through surveying elementary school students' difficulties in the solving of arithmetic word problems. In order to do it, this study was intended to analyze the following two aspects. First, it was analyzed that they generally felt more difficulties in which field among addition, subtraction, multiplication and division word problems. Second, with the result of the first analysis, it was examined that they solved it by imagining as which sphere of the other word problems. Also, the cause of their error on the word problem solving was analyzed by the interview. From the foregoing analyses, the following implications for remedial instruction on arithmetic word problems solving are acquired. First, the accumulation of learning deficiency must be diminished through the remedial instruction. Second, it must help students to understand the given problem and to make of what the goal of problem is. Third, it must help students to form a good habit for reading the problem and to understand the context of problem. forth, the teacher must help students to review and reflect their problem-solving processes.

• Industrial Engineering and Management Systems
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• v.1 no.1
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• pp.87-92
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• 2002

A stochastic process {$A_n$, n = 1, 2, ...} is an arithmetic process (AP) if there exists some real number, d, so that {$A_n$ + (n-1)d, n =1, 2, ...} is a renewal process (RP). AP is a stochastically monotonic process and can be used for modeling a point process, i.e. point events occurring in a haphazard way in time (or space), especially with a trend. For example, the vents may be failures arising from a deteriorating machine; and such a series of failures id distributed haphazardly along a time continuum. In this paper, we discuss estimation procedures for an AP, similar to those for a geometric process (GP) proposed by Lam (1992). Two statistics are suggested for testing whether a given process is an AP. If this is so, we can estimate the parameters d, ${\mu}_{A1}$ and ${\sigma}^{2}_{A1}$ of the AP based on the techniques of simple linear regression, where ${\mu}_{A1}$ and ${\sigma}^2_{A1}$ are the mean and variance of the first random variable $A_1$ respectively. In this paper, the procedures are, for the most part, discussed in reliability terminology. Of course, the methods are valid in any area of application, in which case they should be interpreted accordingly.

• Journal of Elementary Mathematics Education in Korea
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• v.21 no.1
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• pp.1-22
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• 2017

The properties of arithmetic are considered as essential to understand the principles of calculation and develop effective strategies for calculation in the elementary school level, thanks to agreement on early algebra. Therefore elementary students' misunderstanding of the properties of arithmetic might cause learning difficulties as well as misconcepts in their following learning processes. This study aims to provide elementary teachers a part of pedagogical content knowledge about the properties of arithmetic and to induce some didactical implications for teaching the properties of arithmetic in the elementary school level. To do this, elementary school mathematics textbooks since the period of the first curriculum were analyzed. These results from analysis show which properties of arithmetic have been taught, when they were taught, and how they were taught. Based on them, some didactical implications were suggested for desirable teaching of the properties of arithmetic.

• Journal of Educational Research in Mathematics
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• v.17 no.4
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• pp.453-475
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• 2007

School algebra starts with introducing algebraic expressions which have been one of the cognitive obstacles to the students in the transfer from arithmetic to algebra. In the recent studies on the teaching school algebra, algebraic thinking is getting much more attention together with algebraic expressions. In this paper, we examined the processes of the transfer from arithmetic to algebra and ways for teaching early algebra through algebraic thinking factors. Issues about algebraic thinking have continued since 1980's. But the theoretic foundations for algebraic thinking have not been founded in the previous studies. In this paper, we analyzed the algebraic thinking in school algebra from historico-genetic, epistemological, and symbolic-linguistic points of view, and identified algebraic thinking factors, i.e. the principle of permanence of formal laws, the concept of variable, quantitative reasoning, algebraic interpretation - constructing algebraic expressions, trans formational reasoning - changing algebraic expressions, operational senses - operating algebraic expressions, substitution, etc. We also identified these algebraic thinking factors through analyzing mathematics textbooks of elementary and middle school, and showed the middle school students' low achievement relating to these factors through the algebraic thinking ability test. Based upon these analyses, we argued that the readiness for algebra learning should be made through the processes including algebraic thinking factors in the elementary school and that the transfer from arithmetic to algebra should be accomplished naturally through the pre-algebra course. And we searched for alternative ways to improve algebra curriculums, emphasizing algebraic thinking factors. In summary, we identified the problems of school algebra relating to the transfer from arithmetic to algebra with the problem of teaching algebraic thinking and analyzed the algebraic thinking factors of school algebra, and searched for alternative ways for improving the transfer from arithmetic to algebra and the teaching of early algebra.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.774-780
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• 2017

This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.94-97
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• 2002

A VLSI architecture of an Ogg Vorbis decoder is proposed : which is dedicated to portable audio appliances. Referring to the computational cost analysis of the decoding processes, the LSP (Line Spectrum Pair) process, which takes more than 50% of the total processing time, can be regarded as a bottleneck to achieve realtime processing by embedded Processors. Thus in our decoder a specific hardware architecture is devised for the LSP process so as to be integrated into a single chip together with an ARM7TDMI processor. In addition, in order to reduce the total hardware cost, instead of the floating point arithmetic, the fixed point arithmetic is adopted. The LSP module has been implemented with 9,740 gates by using a Virtual Silicon 0.l5$\mu\textrm{m}$ CMOS technology, which operates at 58.8MHz with the total CPU load reduced by 57%. It is also verified that the use of the fixed point arithmetic does not incur any significant sound distortion.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.23 no.56
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• pp.55-64
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• 2000

There is more than a single quality characteristic and they are often of varying or mixed target types. The purpose of this paper is to develop general strategies for solving the multiple response robust design problem. The desirability function provides an important tool to solve problems that have different types of target since the desirability values all the range between zero and one. Several combinations of arithmetic averages, geometric averages, and standard deviations are used in the various strategies to find the best design point.

• Journal of the Korea Society of Computer and Information
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• v.17 no.12
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• pp.49-60
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• 2012

In this paper, we propose a hardware design for correction of barrel distortion using the nearest coordinates in the corrected image. Because it applies the nearest distance on corrected image rather than adjacent distance on distorted image, the picture quality is improved by the image whole area, solve the staircase phenomenon in the exterior area. But, because of additional arithmetic operation using design of bilinear interpolation, required arithmetic operation is increased. Look up table(LUT) structure is proposed in order to solve this, coordinate rotation digital computer(CORDIC) algorithm is applied. The results of the synthesis using Design compiler, the design of implementing all processes of the interpolation method with the hardware is higher than the previous design about the throughput, In case of the rear camera, the design of using LUT and hardware together can reduce the size than the design of implementing all processes with the hardware.

• ETRI Journal
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• v.42 no.4
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• pp.596-607
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• 2020

Scaling is an important operation because of the iterative nature of arithmetic processes in digital signal processors (DSPs). In residue number system (RNS)-based DSPs, scaling represents a performance bottleneck based on the complexity of intermodulo operations. To design an efficient RNS scaler for special moduli sets, a body of literature has been dedicated to the study of the well-known moduli sets {2ⁿ - 1, 2ⁿ, 2ⁿ + 1} and {2ⁿ, 2ⁿ - 1, 2ⁿ⁺¹ - 1}, and their extension in vertical or horizontal forms. In this study, we propose an efficient programmable RNS scaler for the arithmetic-friendly moduli set {2^n+p, 2ⁿ - 1, 2ⁿ⁺¹ - 1}. The proposed algorithm yields high speed and energy-efficient realization of an RNS programmable scaler based on the effective exploitation of the mixed-radix representation, parallelism, and a hardware sharing technique. Experimental results obtained for a 130 nm CMOS ASIC technology demonstrate the superiority of the proposed programmable scaler compared to the only available and highly effective hybrid programmable scaler for an identical moduli set. The proposed scaler provides 43.28% less power consumption, 33.27% faster execution, and 28.55% more area saving on average compared to the hybrid programmable scaler.