• Title/Summary/Keyword: annealing process

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Influence of Wet Annealing on the Performance of SiZnSnO Thin Film Transistors

  • Han, Sangmin;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.1
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    • pp.34-36
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    • 2015
  • Amorphous SiZnSnO(SZTO) thin film transistors(TFTs) have been fabricated by RF magnetron sputtering process, and they were annealed in air and in wet ambient. The electrical performance and the structure were analyzed by I-V measurement, XPS, AFM, and XRD. The results showed improvement in device performance by wet annealing process compared to air annealing treatment, because free electron was shown to be increased due to reaction of oxygen and hydrogen generating oxygen vacancy. This is understood by the generation of free electrons. We expect the wet annealing process to be a promising candidate to contributing to high electrical performance of oxide thin film transistors for backplane device applications.

The critical characteristics resulted from the slow cooling time in the HTSC bulk fabrication (초전도벌크제작시 서냉시간에 따른 임계특성)

  • 임성훈;강형곤;최명호;임성우;한병성
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.185-188
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    • 1997
  • The influence of slow cooling and annealing time in $O_2$ during melting and growth step in MPMG process on J$_{c}$ was investigated. Through the measurement of J$_{c}$ SEM and XRD, it can be observed that the critical characteristics were related with the slow cooling time and annealing time in 02 for melting and growth step of MPMG process. The distribution of critical current density with slow cooling time was the porabolic form and the value of J. was the highest at the 40 hour slow cooling time. And also, the value of J$_{c}$, along the annealing time in $O_2$ in the case of the slow cooling time 40 hour was inclined to increase with annealing time. Consequently, it can be suggested that proper slow cooling titre and annealing time along slow cooling in MPMG process be important to improve the critical characteristics.stics.

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Temperature Characteristics and Annealing Process of the Waveguide Bragg Grating (광도파로 브래그 격자의 온도특성과 열처리 공정)

  • 한준모;서영진;백세종;노흥렬;임기건;최두선
    • Transactions of Materials Processing
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    • v.13 no.3
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    • pp.205-210
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    • 2004
  • The waveguide Bragg gratings have been fabricated by the phase-mask method. An excimer laser with maximum 600mJ output pulse energy and uniform phase masks have been used. Hydrogen loading is often used for enhancing the uv photosensitivity of the core, however, the resultant gratings show significant aging effect. In the present study, high temperature thermal annealing process has been investigated to obtain thermal gratings and process parameters are deduced.

Characteristic in Mg-doped p-type GaN changing activation temperature in $N_2$ gas ambient

  • Lee, Sung-Ho;Kim, Chul-Joo;Seo, Yong-Gon;Seo, Mun-Suek;Hwang, Sung-Min
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.113-114
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    • 2008
  • Conventional furnace annealing (CFA) for activating Mg-doped p-type GaN films had been performed in pure $N_2$ ambient. All sample activated the same gas ambient. The annealing process change temperature: the first process is performed at $550^{\circ}C$ for 10 min. but, the first process is the same bulk. From second to five process increase activation temperature to change $50^{\circ}C$ and annealing time keeping for 10 min. It is found that the samples characteristic measure hall measurement. Similar results were also evidenced by photoluminescence (PL) measurement.

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Characterizations of Interface-state Density between Top Silicon and Buried Oxide on Nano-SOI Substrate by using Pseudo-MOSFETs

  • Cho, Won-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.2
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    • pp.83-88
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    • 2005
  • The interface-states between the top silicon layer and buried oxide layer of nano-SOI substrate were developed. Also, the effects of thermal treatment processes on the interface-state distributions were investigated for the first time by using pseudo-MOSFETs. We found that the interface-state distributions were strongly influenced by the thermal treatment processes. The interface-states were generated by the rapid thermal annealing (RTA) process. Increasing the RTA temperature over $800^{\circ}C$, the interface-state density considerably increased. Especially, a peak of interface-states distribution that contributes a hump phenomenon of subthreshold curve in the inversion mode operation of pseudo-MOSFETs was observed at the conduction band side of the energy gap, hut it was not observed in the accumulation mode operation. On the other hand, the increased interface-state density by the RTA process was effectively reduced by the relatively low temperature annealing process in a conventional thermal annealing (CTA) process.

Rapid Theraml Annealing Effect on the Magnetic Tunnel Junction with MgO Tunnel Barrier (MgO 절연막을 갖는 자기 터널 접합구조에서의 급속 열처리 효과)

  • Min, Kiljoon;Lee, Kyungil;Kim, Taewan;Jang, Joonyeon
    • Journal of the Korean Magnetics Society
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    • v.25 no.2
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    • pp.47-51
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    • 2015
  • To achieve a high tunneling magneto resistance (TMR) of sputtered magnetic tunnel junctions (MTJs) with an MgO barrier, the annealing process is indispensable. The structural and compositional changes as consequences of the annealing greatly affect the spin-dependent transport properties of MTJs. Higher TMR could be obtained for MTJs annealed at higher annealing temperature. The diffusion of Ru, Mn and/or Ta in the MTJs may occur during annealing process, which is known to be detrimental to spin-dependent tunneling effect. The rapid thermal annealing (RTA) process was used for annealing the MTJs with synthetic antiferromagnets. To suppress the diffusion of Mn, Ru and/or Ta in the MTJs, the process time and temperature of RTA were minutely controlled.

Preparation of tetragonal phase L10 FePt thin films with H2 annealing atmosphere (수소 분위기 중 열처리법을 이용한 고자기이방성 L10 FePt 박막 제작)

  • Kong, Sok-Hyun;Kim, Kyung-Hwan
    • Journal of the Korean Vacuum Society
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    • v.16 no.5
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    • pp.343-347
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    • 2007
  • Fe thin films exhibited (100) preferential orientation when they were deposited at low deposition rate of $0.1{\AA}/s$ on glass substrates by using facing target sputtering system. The (100) oriented Fe layer induces (100) orientation of Pt layer deposited on it owing to hetero-epitaxial growth. After annealing at $600^{\circ}C$ in $H_2$ atmosphere, FePt films exhibited f.c.t. (001) texture in the whole film caused by inter-diffusion between atoms. We have also confirmed that the homogeneously inter-diffused compositional modulation in the film after the annealing process. Furthermore, annealing process in $Ar+H_2$ atmosphere at $400^{\circ}C$ during Pt deposition was effective for attaining Pt (100) texture. The annealing process during Pt deposition also induced in low annealing temperature and decreased annealing time for attaining the FePt f.c.t. (001) structure.

Medoid Determination in Deterministic Annealing-based Pairwise Clustering

  • Lee, Kyung-Mi;Lee, Keon-Myung
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.11 no.3
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    • pp.178-183
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    • 2011
  • The deterministic annealing-based clustering algorithm is an EM-based algorithm which behaves like simulated annealing method, yet less sensitive to the initialization of parameters. Pairwise clustering is a kind of clustering technique to perform clustering with inter-entity distance information but not enforcing to have detailed attribute information. The pairwise deterministic annealing-based clustering algorithm repeatedly alternates the steps of estimation of mean-fields and the update of membership degrees of data objects to clusters until termination condition holds. Lacking of attribute value information, pairwise clustering algorithms do not explicitly determine the centroids or medoids of clusters in the course of clustering process or at the end of the process. This paper proposes a method to identify the medoids as the centers of formed clusters for the pairwise deterministic annealing-based clustering algorithm. Experimental results show that the proposed method locate meaningful medoids.

A Study on Annealing of Fe-Si-B-Ni Amorphous Alloy (Fe-Si-B-Ni 비정질 합금의 어닐링에 관한 연구)

  • Kim, Shin-Woo;Song, Yong-Sul;Baek, Mu-Hum
    • Korean Journal of Materials Research
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    • v.13 no.11
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    • pp.721-724
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    • 2003
  • A Fe-Si-B-Ni amorphous alloy manufactured by one roll melt-spinning method showed the crystallization temperature difference of a maximum $10^{\circ}C$ according to each lot. This temperature difference had a considerable influence on the annealing process to be conducted for obtaining the proper inductance of the alloy. The proper annealing temperature of the alloy was $480^{\circ}C$ and the annealing time increased as the crystallization temperature increased. The activation energy measured by Kissinger method increased as the crystallization temperature increased. Therefore, the annealing process must be adjusted by the crystallization temperature difference of the amorphous alloy.

Effects of Annealing on Silicon Dioxide using Rapid Thermal Process System (급속 열처리 장치를 이용한 실리콘 산화막의 Annealing 효과)

  • Park, H,W.;Jang, H.Y.;Hwang, H.J.
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.383-386
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    • 1988
  • In MOS integrated circuits, annealing after oxidation process is necessary to improve physical properties of silicon dioxide. With subsequent annealing in inert gases such as nitrogen or argon, and excess silicon bond is allowed time to complete the oxidation and surface charge density is reduced. In this paper, we will present effects of the rapid thermal annealing on silicon dioxide. In order to evaluate characteristics of silicon dioxide, we analyzed C-V curve dependent on annealing time and temperature, and presented variation of fixed oxide charge.

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