• Title/Summary/Keyword: amplifiers

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High Performance Silicon LDMOSFET for RF Power Amplifiers (RF 전력증폭기용 고성능 실리콘 LDMOSFET)

  • 신창희;김진호;권오경
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.695-698
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    • 2003
  • This paper presents a Si power LDMOSFET for power amplifiers in the 1.8-2.2GHz frequency range for the base station of personal communication systems. To improve the cut-off frequency, the proposed Si power LDMOSFET has small gate to drain capacitance by shielding the electric fields with extended source electrode and forming the field oxide structure in drain region. The proposed Si power LDMOSFET can be used for a power amplifier and it has 32% of power added efficiency and 39.5dBm of output power when the supply voltage is 28V and the operating frequency is 1.9GHz.

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Design and Fabrication of Power Amplifiers for IMT-2000 (IMT-2000용 대전력 증폭기의 설계 및 제작)

  • 박천석;정성찬
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.135-138
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    • 1999
  • In this paper, we designed each matching networks by given input and output impedances of power amplifiers. Mearsured results for IMD and gain flatness are -30㏈c and $\pm$0.2㏈ with 38㏈m output power PEP of PTE10119 at 2.10-2.20㎓ and are -30㏈c and $\pm$0.4㏈ with 42㏈m output power PEP of MRF284 at same frequency range.

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The design of high-accuracy CMOS sampel-and-hold amplifiers (고정밀 CMOS sample-and-hold 증폭기 설계 기법 및 성능 비교)

  • 최희철;장동영;이성훈;이승훈
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.239-247
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    • 1996
  • The accuracy of sample-and-hold amplifiers (SHA's) empolying a CMOS process in limited by nonideal factors such as linearity errors of an op amp and feedthrough errors of switches. In this work, after some linearity improvement techniques for an op amp are discussed, three different SHA's for video signal processing are designed, simulated, and compared. The CMOS SHA design techniques with a 12-bit level accuracy are proposed by minimizing cirucit errors based on the simulated results.

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A New Approach for Built-in Self-Test of 4.5 to 5.5 GHz Low-Noise Amplifiers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • v.28 no.3
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    • pp.355-363
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    • 2006
  • This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

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Design of Lossy Interstage Network for Microwave Amplifiers Considering Gain and Reflection Coefficients (이득과 반사계수를 고려한 마이크로파 증폭기용 유손실 중간단 정합회로 설계)

  • 구경헌;이충웅
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.12
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    • pp.1940-1946
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    • 1989
  • A design method of lossy interstage networks for broadband microwave amplifiers is presented. A lossy interstage network is assumed as the combination of two lossless networks between which a lossy serial impedance or a lossy parallel admittance is inserted. For the circuit with two transistors and a lossy element, realizable ranges of gain and reflection coefficients are derived. And the relationships between gain and reflection coefficients are derived. Illustrative examples are presented by using the proposed method.

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Hot Electron Induced Input offset Voltage Modeling in CMOS Differential Amplifiers (Hot electron에 의한 CMOS 차동증폭기의 압력 offset 전압 모델링)

  • Jong Tae Park
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.7
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    • pp.82-88
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    • 1992
  • This paper presents one of the first comprehensive studies of how hot electron degradation impacts the input offset voltage of a CMOS differential amplifiers. This study utilizes the concept of a virtual source-coupled MOSFET pair in order to evaluate offset voltaged egradation directly from individual device measurement. Next, analytical models are developed to describe the offset voltage degradation. These models are used to examine how hot electron induced offset voltage is affected with the device parameters.

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Characteristics of multi-stage dye laser amplification and Second Harmonic Generation (색소레이저의 다단 증폭 및 SHG 특성)

  • 이영우
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.4
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    • pp.946-949
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    • 2004
  • We obtained ultra-short single pulse with an energy of 80 uJ from Distributed feedback Dye laser. Using three stages of amplifiers constructed by two stages of dye amplifiers and one bethune cell amplifier, we obtained high power pulse and second harmonic generation with BBO in ultraviolet region.

Three stage amplification of Distributed Feedback Dye Laser (Distributed Feedback Dye Laser의 3단 증폭특성)

  • 이영우
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05b
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    • pp.339-341
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    • 2004
  • We obtained ultra-short single pulse with an energy of 80 of from self Q-switched Distributed Feedback Dye Laser. Using three stages of amplifiers constructed by two stages of dye amplifiers and one bethune cell amplifier, we obtained high power pulse and second harmonic generation with BBO in ultraviolet region.

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Design of Wideband Cascode Amplifiers Using a Feedback Structure (피드백 구조를 갖는 광대역 캐스코드 증폭기의 설계)

  • Lee, Jaehoon;Lim, Jongsik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.1
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    • pp.720-725
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    • 2015
  • This paper describes the design of a wideband cascode amplifier using a feedback network and microwave small-signal transistors. The adopted cascode structure enables the miller effect to be lessened, cutoff frequency to increase, and reduction of gain in the mid-band to be mitigated. In addition, a feedback network is added to the cascode structure to improve the input matching and ripple performances over the wide operating band. The designed cascode amplifier contains a feedback network for small size and broadband amplification, whereas balanced amplifiers and distributed amplifiers have been used widely. The measurement shows $8.5dB{\pm}1.5dB$ of gain over 1000-2000MHz. The fabricated cascode amplifier has more than 8dB of gain over a 1000MHz bandwidth with a good flatness. The measured performances agree with the predicted ones even a minor shift in operating frequency is observed.

Design of a Cascaded Distributed Amplifier using Medium Power Devices (중간전력 소자를 이용한 직렬 분포형 증폭기 설계)

  • Cha, Hyeon-Won;Koo, Jae-Jin;Lim, Jong-Sik;Ahn, Dal
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.8
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    • pp.1817-1823
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    • 2009
  • A design of cascaded distributed amplifier with a broadband amplification is described in this paper. A medium power device with 23dBm, max output power under the optimal narrow-band power matching condition is adopted for the design and fabrication of the cascaded distributed amplifier. In general, conventional distributed amplifiers with the parallel connected input ports have a low gain, and previous cascaded distributed amplifiers show a relatively low output power of 10dBm at most, which is the upper limit of small signal amplification. However, the cascaded distributed amplifier in this paper shows the gain of $18.15{\pm}0.75dB$ and output power of 20dBm over $300MHz{\sim}2GHz$ from the measurement, so it can be well adopted as a wideband driver amplifier.