• Journal of information and communication convergence engineering
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• v.2 no.2
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• pp.93-96
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• 2004

The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.

• Journal of Information Display
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• v.7 no.3
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• pp.1-4
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• 2006

2.22-inch qVGA $(240{\times}320)$ amorphous silicon thin film transistor liquid active matrix crystal display (a-Si TFT-AMLCD) panel has been successfully demonstrated employing a 2.5 um fine-patterning technology by a wet etch process. Higher resolution 2.22-inch qVGA LCD panel with an aperture ratio of 58% can be fabricated as the 2.5 um fine pattern formation technique is integrated with high thermal photo-resist (PR) development. In addition, a novel concept of unique a-Si TFT process architecture, which is advantageous in terms of reliability, was proposed in the fabrication of 2.22-inch qVGA LCD panel. Overall results show that the 2.5 um fine-patterning is a considerably significant technology to obtain higher aperture ratio for higher resolution a-Si TFT-LCD panel realization.

• Korean Chemical Engineering Research
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• v.48 no.6
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• pp.737-740
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• 2010

High leakage current and threshold voltage shift(${\Delta}Vth$) are demerits of a-Si:H TFT. These characteristics are influenced by gate insulator and active layer film quality, surface roughness, and process conditions. The purpose of this investigation is to improve off current($I_{off}$) and ${\Delta}V_{th}$ characteristics. Nitrogen-rich deposition condition was applied to gate insulator, and hydrogen-rich deposition condition was applied to active layer to reduce electron trap site and improve film density. $I_{off}$ improved from 1.01 pA to 0.18 pA at $65^{\circ}C$, and ${\Delta}V_{th}$ improved from -1.89 V to 1.22 V.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.46-49
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• 2002

Recent trends of low-temperature polycrystalline Si (LTPS) TFT technologies are presented. Characteristics of LTPS TFT processes are compared with those of a-Si TFT's. In order to compete with well-established a-Si TFT-LCD technology, LTPS process has to be as simple as possible. One of the most critical processes, recrystallization of a-Si thin films, could be the process for the differentiation of LTPS technology. Along with these technical reviews, a recent development of the 5.0-inch LTPS TFT-LCD is presented. In order to achieve high-performance display characteristics and save the power consumption, the transflective mode is adopted. The 5.0-inch display with 186 pixel-per-inch, high-resolution LCD was measured to be 10% for the reflectance and 70:1 for the contrast ratio. This display is designed for a high information content hand-held PC (HHPC) application.

• ETRI Journal
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• v.29 no.1
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• pp.45-49
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• 2007

The poly-Si thin film transistor (TFT) shows large variations in its characteristics due to the grain boundary of poly-crystalline silicon. This results in unacceptably large input offset of low-voltage differential signaling (LVDS) receivers. To cancel the large input offset of poly-Si TFT LVDS receivers, a full-digital offset compensation scheme has been developed and verified to be able to keep the input offset under 15 mV which is sufficiently small for LVDS signal receiving.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.205-207
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• 2008

The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.51-54
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• 2007

Top-emission 3.5 inch qVGA IOD (Inverted AMOLED) was fabricated with inverted EL structure driven by a-Si TFT backplane. In order to get stable driving TFT, we used FCP(Field Control Plate) layer which was connected with the source of the driving TFT. And we developed planarization process to planarize the cathode layer which was the bottom layer of inverted OLED. Our unique IOD structure is “a-Si TFT/ Al(Cathode)/ LiF/ LG-201(ETL)/ EML(RGB)/ HTL/ LG-101(HIL & Buffer layer)/ IZO(Anode)”. LG-201(ETL) layer was studied for more efficient electron injection from cathode to EML, and LG-101(HIL & Buffer layer) covered by IZO anode was also explored for decreasing the EL surface damage.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1673-1676
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• 2007

We have investigated the degradation mechanism of hydrogenated amorphous silicon (a- Si:H) thin film transistors (TFTs) The threshold voltage of driving a-Si:H TFT is shifted severely by electrical bias due to a charge trapping and defect state creation. And the short channel TFTs exhibit less threshold voltage degradation than long channel TFTs. We propose the pixel circuits employing negative bias annealing scheme in order to suppression of threshold voltage shift of a-Si:H TFT.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.961-963
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• 2009

a-Si process-based advanced-SPC (a-SPC) TFT has been developed and verified by manufacturing an AMOLED panel having improved cost competitiveness by using the existing a-Si infrastructure. The a-SPC TFT had superior device reliability and current drivability to a-Si TFT to meet the requirements of AMOLED backplane.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1176-1178
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• 2007

A novel integrated a-Si:H gate driver with high reliability has been designed and simulated. Since the a-Si:H TFT is easily degraded by gate bias stress, we should optimize the circuit considering the threshold voltage shift. The conventional circuit shows voltage drop at the input stage by threshold voltage of the TFT, however, the proposed circuit dose not shows voltage drop and keeps constant regardless of threshold voltage shift of the TFT.