• Title/Summary/Keyword: a Si:H TFT

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a- Si:H TFT Level Shifter with Reduced Number of Power

  • Jeong, Nam-Hyun;Chun, Young-Tea;Kim, Jung-Woo;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.20-23
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    • 2008
  • We proposed a-Si:H TFT (hydrogenated amorphous silicon thin film transistor) level shifter which reduced number of power sources. To reduce the number of power sources from four to two, modified bootstrapped inverter was used for the level shifter. The shift register was verified by PSPICE circuit simulation and fabricated. The fabricated level shifter successfully shifted low input (0 to 5 V) to high level output (-7 to 23 V).

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A novel integrated a-Si:H gate driver

  • Lee, Jung-Woo;Hong, Hyun-Seok;Lee, Eung-Sang;Lee, Jung-Young;Yi, Jun-Shin;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1176-1178
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    • 2007
  • A novel integrated a-Si:H gate driver with high reliability has been designed and simulated. Since the a-Si:H TFT is easily degraded by gate bias stress, we should optimize the circuit considering the threshold voltage shift. The conventional circuit shows voltage drop at the input stage by threshold voltage of the TFT, however, the proposed circuit dose not shows voltage drop and keeps constant regardless of threshold voltage shift of the TFT.

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Hysteresis Phenomenon of Hydrogenated Amorphous Silicon Thin Film Transistors for an Active Matrix Organic Light Emitting Diode (능동형 유기 발광 다이오드(AMOLED)에서 발생하는 수소화된 비정질 실리콘 박막 트랜지스터(Hydrogenated Amorphous Silicon Thin Film Transistor)의 이력 (Hysteresis) 현상)

  • Choi, Sung-Hwan;Lee, Jae-Hoon;Shin, Kwang-Sub;Park, Joong-Hyun;Shin, Hee-Sun;Han, Min-Koo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.1
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    • pp.112-116
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    • 2007
  • We have investigated the hysteresis phenomenon of a hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and analyzed the effect of hysteresis phenomenon when a-Si:H TFT is a pixel element of active matrix organic light emitting diode (AMOLED). When a-Si:H TFT is addressed to different starting gate voltages, such as 10V and 5V, the measured transfer characteristics with 1uA at $V_{DS}$ = 10V shows that the gate voltage shift of 0.15V is occurred due to the different quantities of trapped charge. When the step gate-voltage in the transfer curve is decreased from 0.5V to 0.05V, the gate-voltage shift is decreased from 0.78V to 0.39V due to the change of charge do-trapping rate. The measured OLED current in the widely used 2-TFT pixel show that a gate-voltage of TFT in the previous frame can influence OLED current in the present frame by 35% due to the change of interface trap density induced by different starting gate voltages.

a-Si:H in TFT-LCD that integrated Gate driver circuit : Instability effect by temperature (Gate 구동 회로를 집적한 TFT-LCD에서 a-Si:H TFT의 온도에 따른 Instability 영향)

  • Lee, Bum-Suk;Yi, Jun-Sin
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.2061-2062
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    • 2006
  • a-Si(amorphous silicon) TFT(thin film transistor)는 TFT-LCD(liquid crystal display)의 화소 스위칭(switching) 소자로 폭넓게 이용되고 있다. 현재는 a-Si을 이용하여 gate drive IC를 기판에 집적하는 ASG(amorphous silicon gate) 기술이 연구, 적용되고 있는데 이때 가장 큰 제약은 문턱 전압(Vth)의 이동이다. 특히 고온에서는 문턱 전압의(Vth) 이동이 가속화 되고, Ioff current가 증가 하게 되고, 저온($0^{\circ}C$)에서는 전류 구동능력이 상온($25^{\circ}C$) 상태에서 같은 게이트 전압(Vg)에 대해서 50% 수준으로 감소하게 된다. 특히 ASG 회로는 여러 개의 TFT로 구성되는데, 각각의 TFT가 고온에서 Vth shift 값이 다르게 되어 설계시 예상하지 못 한 고온에서의 화면 무너짐 현상 즉 고온 노이즈 불량이 발생 할 수 있다. 고온 노이즈 불량은 고온에서의 각 TFT의 문턱전압 및 $I_D-V_G$ 특성을 측정한 결과 고온 노이즈 불량에 영향을 주는 인자가 TFT의 width와 기생 capacitor비 hold TFT width가 영향을 주는 것으로 실험 및 시뮬레이션 결과 확인이 되었다. 발생 mechanism은 ASG 회로는 AC 구동을 하기 때문에 Voff 전위에 ripple이 발생 되는데 특히 고온에서 ripple이 크게 증가 하여 출력 signal에 영향을 주어 불량이 발생하는 것을 규명하였다.

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Recent Trend of Low Temperature Poly Silicon Technologies in TFT-LCD

  • Kim, C.W.;Kim, H.J.;Lee, H.G.;Min, H.G.;Hwang, J.W.;Cho, S.W.;Ryu, C.K.;Lee, C.;Kang, M.K.;Chung, K.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.46-49
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    • 2002
  • Recent trends of low-temperature polycrystalline Si (LTPS) TFT technologies are presented. Characteristics of LTPS TFT processes are compared with those of a-Si TFT's. In order to compete with well-established a-Si TFT-LCD technology, LTPS process has to be as simple as possible. One of the most critical processes, recrystallization of a-Si thin films, could be the process for the differentiation of LTPS technology. Along with these technical reviews, a recent development of the 5.0-inch LTPS TFT-LCD is presented. In order to achieve high-performance display characteristics and save the power consumption, the transflective mode is adopted. The 5.0-inch display with 186 pixel-per-inch, high-resolution LCD was measured to be 10% for the reflectance and 70:1 for the contrast ratio. This display is designed for a high information content hand-held PC (HHPC) application.

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The Degradation Characteristics Analysis of Poly-Silicon n-TFT the Hydrogenated Process under Low Temperature (저온에서 수소 처리시킨 다결정 실리콘 n-TFT의 열화특성 분석)

  • Song, Jae-Yeol;Lee, Jong-Hyung;Han, Dae-Hyun;Lee, Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.9
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    • pp.1615-1622
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    • 2008
  • We have fabricated the poly-silicon thin film transistor(TFT) which has the LDD-region with graded spacer. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $H_2$/plasma processes were fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring/analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si grain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplicities of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.205-207
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    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

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A Study on the Physical Parameters of Amorphous Silicon using a Two-Dimensional Device Simulator(TFT2DS) (이차원 소자 시뮬레이터를 이용한 비정질 실리콘 물성 파라메타에 관한 연구)

  • 곽지훈;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.04a
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    • pp.168-171
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    • 1997
  • TFT2DS was developed to provide the usefulness as an analytic and design tool. The static characteristics of a-Si:H TFTs demonstrated a good agreement between simulated and measured data. This paper shows that TFT2DS can optimize the physical parameters of a-Si:H through sensitivity simulations and compute the static characteristics of a-Si:H TFTs. Moreover, through the sensitivity study of the parameters, it is shown that the optimizations of both the physical parameters of a-Si:H and the parameters of a-Si:H deposition, which must be inter-related, might be possibl.

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The thermal annealing effect on electrical performances of a-Si:H TFT fabricated on a metal foil substrate

  • Han, Chang-Wook;Nam, Woo-Jin;Kim, Chang-Dong;Kim, Ki-Yong;Kang, In-Byeong;Chung, In-Jae;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.745-748
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    • 2007
  • Hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) were fabricated on a flexible metal substrate at $150\;^{\circ}C$. To increase the stability of the flexible a-Si:H TFTs, they were thermally annealed at $230\;^{\circ}C$. The field effect mobility was reduced because of the strain in a- Si:H TFT under thermal annealing.

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The Image Sensor Operating by Thin Film Transistor (박막트랜지스터에 의해 구동되는 이미지센서)

  • Hur Chang-wu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.1
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    • pp.111-116
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    • 2006
  • In this paper, the image sensor using the a-Si:H TFT is proposed. The optimum amorphous silicon thin film is deposited using plasma enhanced chemical vapor deposition (PECVD). TFT and photodiode both with the thin film are fabricated and form image sensor. The photodiode shows that Idark is $10^{-12}A$, Iphoto is $10^{-9}A$ and Iphoto/Idark is $10^3$, respectively. In the case of a-Si:H TFT, it indicates that Ion/Ioff is $10^6$, the drain current is a few ${\mu}A$ and Vth is $2\~4$ volts. For the analysis on the fabricated image sensor, the reverse bias of -5 voltage in ITO of photodiode and $70{\mu}sec$ pulse in the gate of TFT are applied. The image sensor with good property was conformed through the measured photo/dark current.