• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.15-16
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• 2000

The gate bias stress effect of the hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a $SiN_x/BCB$ gate insulator have been studied. The gate planarization was carried out by spin-coating of BCB (benzocyclobutene) on Cr gates. The BCB exhibits charge trappings during a high gate bias, but the stability of the TFT is the same as conventional one when it is between -25 V and +25 V. The charge trap density in the BCB increases with its thickness.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.279.1-279.1
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• 2016

박막 트랜지스터 (thin film transistor, TFT)는 고밀도, 대면적화로 높은 전자의 이동도가 요구되면서, 비정질 실리콘 (a-Si)에서 다결정 실리콘 (poly-Si) TFT 로 연구되었다. 이에 따라 비정질 실리콘에서 결정질 실리콘으로의 상변화에 대한 결정화 연구가 활발히 진행되었다. 또한, 박막 태양전지 분야에서도 유리기판 위에 비정질 층을 증착한 후에 열처리를 통해 상변화하는 고상 결정화 (solid-phase crystallization, SPC) 기술을 적용하여, CSG (thin-film crystalline silicon on glass) 태양전지를 보고하였다. 이러한 비정질 실리콘 층의 결정화 기술을 결정질 실리콘 태양전지 에미터 형성 공정에 적용하고자 한다. 이 때, 플라즈마화학증착 (Plasma-enhanced chemical vapor deposition, PECVD) 장비로 증착된 비정질 실리콘 층의 열처리를 통한 결정화 정도가 중요한 요소이다. 따라서, 비정질 실리콘 층의 결정화에 영향을 주는 인자에 대해 연구하였다. 비정질 실리콘 증착 조건(H2 가스 비율, 도펀트 유무), 실리콘 기판의 결정방향, 열처리 온도에 따른 결정화 정도를 엘립소미터(elipsometer), 투과전자현미경 (transmission electron microscope, TEM), 적외선 분광기 (Fourier Transform Infrared, FT-IR) 측정을 통하여 비교 하였다. 이를 기반으로 결정화 온도에 따른 비정질 실리콘의 결정화를 위한 활성화 에너지를 계산하였다. 비정질 실리콘 증착 조건 보다 기판의 결정방향이 결정화 정도에 크게 영향을 미치는 것으로 확인하였다.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2052-2054
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• 2005

TFT-LCD requires to use poly silicon for High resolution and High integration. Thin film make of Poly silicon on the excimer laser-induced crystallization of PECVD(plasma-enhanced chemical vapor deposition)-grown amorphous silicon. In the thin film hydrogen affects to a device performance from bad elements like eruption, void and etc. So dehydrogenation prior to laser exposure was necessary. In this study, use RTP(Rapid Thermal Process) at various temperature from $670^{\circ}C$ to $750^{\circ}C$ and fabricate poly-silicon. it propose optimized RTP window to compare grain size to use poly silicon's SEM pictures and crystallization to analyze Raman curved lines.

• Electrical & Electronic Materials
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• v.9 no.6
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• pp.558-563
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• 1996

We fabricated high voltage hydrogenerated amorphous silicon thin film transistors (a Si:H HVTFT) and investigated its temperature dependent characteristics of from 303 K to 363 K. The results show that the drain current was decreased at low gate voltage and increased at high gate voltage exponentially. According to the increasing the thickness of a Si layer, drain current increased. Difference of drain current at 363 K was increasd at the lower gate voltage and decreased at the higher gate voltage. When the drain and gate voltage of 100 V applied, the drain current increased linearly with rise temperature.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.325-328
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• 2002

We developed a high performance 2.2" active matrix OLED display for IMT-2000 mobile phone. Scan and Data driver circuits were integrated on the glass substrate, using low temperature poly-Si(LTPS) TFT CMOS technology. High efficiency EL materials were employed to the panel for low power consumption. Peak luminescence of the panel was higher than 250cd/$m^2$ with power consumption of 200mW.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.2
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• pp.99-104
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• 2021

Ion-beam sputtering (IBS) was used to deposit semiconducting IZTO (indium zinc tin oxide) thin films onto heavily-doped Si substrates using a sintered ceramic target with the nominal composition In0.4Zn0.5Sn0.1O1.5, which could work as a channel layer for oxide TFT (oxide thin film transistor) devices. The crystallization behavior and electrical properties were examined for the films in terms of deposition parameters, i.e. target tilt angle and substrate temperature during deposition. The thickness uniformity of the films were examined using a stylus profilometer. The observed difference in electrical properties was not related to the degree of crystallization but to the deposition temperature which affected charge carrier concentration (n), electrical resistivity (ρ), sheet resistance (Rs), and Hall mobility (μH) values of the films.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.2
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• pp.303-310
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• 2008

We fabricated hydrogenated amorphous silicon(a-Si:H) 140 nm thick film on a $180\;nm-SiO_2/Si$ substrate with an inductively-coupled plasma chemical vapor deposition(ICP-CVD) equipment at $250^{\circ}C$. Moreover, 30 nm-Ni film was deposited with a thermal-evaporator sequently. Then the film stack was annealed to induce silicides by a rapid thermal annealer(RTA) at $200{\sim}500^{\circ}C$ in every $50^{\circ}C$ for 30 minuets. We employed a four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), and scanning probe microscope(SPM) in order to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure evolution, and surface roughness, respectively. We confirmed that nano-thick high resistive $Ni_3Si$, mid-resistive $Ni_2Si$, and low resistive NiSi phases were stable at the temperature of <300, $350{\sim}450^{\circ}C$, and >$450^{\circ}C$, respectively. Through SPM analysis, we confirmed the surface roughness of nickel silicide was below 12 nm, which implied that it was superior over employing the glass and polymer substrates.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.145-148
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• 2007

The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1116-1118
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• 2005

We studied laser crystallization of amorphous silicon films prepared at ultra low temperatures ($<150^{\circ}C$). Amorphous silicon films having a low content of hydrogen were deposited by using catalytic chemical vapor deposition method. Influence of process parameters on the hydrogen content was investigated. Laser crystallization was performed dispensing with the preliminary dehydrogenation process. Crystallization took place at a laser energy density value as low as $70\;mJ/cm^2$, and the grain size increased with increasing the laser energy. The ELA crystallization of Catalytic CVD a-Si film is a promising candidate for Poly-Si TFT in active-matrix flexible display on plastic substrates.

• Korean Journal of Materials Research
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• v.28 no.4
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• pp.247-253
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• 2018

We examined the characteristics of indium tin zinc oxide (ITZO) thin film transistors (TFTs) on polyimide (PI) substrates for next-generation flexible display application. In this study, the ITZO TFT was fabricated and analyzed with a SiOx/SiNx gate insulator deposited using plasma enhanced chemical vapor deposition (PECVD) below $350^{\circ}C$. X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) results revealed that the oxygen vacancies and impurities such as H, OH and $H_2O$ increased at ITZO/gate insulator interface. Our study suggests that the hydrogen related impurities existing in the PI and gate insulator were diffused into the channel during the fabrication process. We demonstrate that these impurities and oxygen vacancies in the ITZO channel/gate insulator may cause degradation of the electrical characteristics and bias stability. Therefore, in order to realize high performance oxide TFTs for flexible displays, it is necessary to develop a buffer layer (e.g., $Al_2O_3$) that can sufficiently prevent the diffusion of impurities into the channel.