• ETRI Journal
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• 제33권3호
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• pp.366-373
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• 2011

In this paper, we propose a low-power all-digital phase-locked loop (ADPLL) with a wide input range and a high resolution time-to-digital converter (TDC). The resolution of the proposed TDC is improved by using a phase-interpolator and the time amplifier. The phase noise of the proposed ADPLL is improved by using a fine resolution digitally controlled oscillator (DCO) with an active inductor. In order to control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. The die area of the ADPLL is 0.8 $mm^2$ using 0.13 ${\mu}m$ CMOS technology. The frequency resolution of the TDC is 1 ps. The DCO tuning range is 58% at 2.4 GHz and the effective DCO frequency resolution is 0.14 kHz. The phase noise of the ADPLL output at 2.4 GHz is -120.5 dBc/Hz with a 1 MHz offset. The total power consumption of the ADPLL is 12 mW from a 1.2 V supply voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.305-308
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode rectifiers is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode rectifiers and guarantee zero-current -switching(ZCS) of the switch over the wide load range The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. IN addition control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.348-351
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• 2001

In this paper, the Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback(CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using TSMC $0.35{\mu}m$ CMOS n-well parameters. The simulation results show 138kHz cutoff frequency and 11.05mW power dissipation with a 3.3V supply voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.395-398
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• 2005

A novel full-bridge converter with a new energy-recovery driver implemented a regenerative transformer is proposed to improve the efficiency for wide input voltage range and load variation. The main switches achieve ZVS independent of the load current condition. During the free wheeling period, conduction loss is minimized by recovering the circulating energy to the source. The principle of operation, design consideration and experimental result, including efficiency, are presented in the case of large variation of the input voltage or load. A proposed 1kW converter prototype is compared with a PS-FB converter.

• 전자공학회논문지SC
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• 제38권5호
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• pp.52-58
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• 2001

본 논문에서는 직렬 복합 트랜지스터를 이용한 저전압 선형 가변 트랜스컨덕터를 설계하였다. 직렬 복합트랜지스터는 포화 영역에서 동작하는 트랜지스터와 선형 영역에서 동작하는 트랜지스터가 직렬 연결된 구조로 낮은 공급 전압에서도 넓은 입력 전압 범위를 갖는다. 설계된 트랜스컨덕터는 $0.25{\mu}m$ CMOS n-well 공정 파라미터를 이용하여 HSPICE로 시뮬레이션한 결과 차단주파수는 309MHz 이고, 입력 신호 주파수가 10MHz일 때 1.5VP-P의 차동 입력에 대해 1.1%이하의 THD 특성을 갖는다.

• Journal of Power Electronics
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• 제17권1호
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• pp.200-211
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• 2017

Conventional boost-full-bridge and boost-hybrid-bridge two-stage inverters are widely applied in order to adapt to the wide dc input voltage range of photovoltaic arrays. However, the efficiency of the conventional topology is not fully optimized because additional switching losses are generated in the voltage conversion so that the input voltage rises and then falls. Moreover, the electrolytic capacitors in a dc-link lead to a larger volume combined with increases in both weight and cost. This paper proposes a higher efficiency inverter with time-sharing synchronous modulation. The energy transmission paths, wheeling branches and switching losses for the high-frequency switches are optimized so that the overall efficiency is greatly improved. In this paper, a contrastive analysis of the component losses for the conventional and proposed inverter topologies is carried out in MATLAB. Finally, the high-efficiency under different switching frequencies and different input voltages is verified by a 3 kW prototype.

• 전력전자학회논문지
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• 제15권6호
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• pp.466-476
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• 2010

본 논문에서 다이오드정류기와 커패시터 필터로 구성된 입력전원을 가지고 동작되는 60W이하의 출력파워용량을 갖는 노트북용 어댑터를 위한 새로운 LLC 공진컨버터에 대한 내용이다. 보조스위치의 동작에 의해 제안된 LLC 공진컨버터는 모든 입력전원 (110VAC/220VAC) 및 부하조건에서 높은 효율특성을 가지고 전력을 전달 할 수 있다. 제안된 컨버터에 대한 동작특성에 대해 분석, 서술되어 있으며, 60W 시제품제작 및 실험을 통하여 적용 가능함을 보였다.

• Journal of Electrical Engineering and Technology
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• 제11권1호
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• pp.100-108
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• 2016

This paper presents a simple high efficiency full-bridge DC-DC converter using a series resonant capacitor. The proposed converter achieves the zero voltage switching of the primary switches under a wide range of load conditions and reduces the high circulating current in the freewheeling mode using the leakage resonant inductance and the series resonant capacitor. Thus, the proposed converter overcomes the drawbacks of the conventional full-bridge DC-DC converter and improves its overall system efficiency. Its structure is simplified by using the leakage inductance of the transformer as the resonant inductance and omitting the DC output filter inductance. Also it can operate over a wide range of input voltages. In this paper, the operational principle, analysis and design example are described in detail. Finally, the experimental results from a 650W (24V/27A) prototype are demonstrated to confirm the operation, validity and features of the proposed converter.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• 전력전자학회논문지
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• 제16권3호
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• pp.242-249
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• 2011

제안하는 컨버터는 부스트 하프브리지-전압 더블러를 각각 병렬-직렬로 연결하여 출력전력 및 출력전압을 증대시키므로 고승압 대전력 응용에서 소자의 선정이 용이하다. 특히 고주파변압기 턴 비를 작게 할 수 있고 DC 오프셋이 제거되어 최적의 변압기 설계가 가능하며, 3개의 코아로 전력이 분배되어 Low Profile 및 열 분산에 유리하다. 제안하는 컨버터는 전 영역(0 ∼ 1)의 듀티 사용으로 스타트업 및 추가의 클램프회로가 필요 없으며 입력전압 변동이 큰 응용에 적합하다. 또한 넓은 듀티영역에서 스위치의 ZVS 턴온과 다이오드의 ZCS 턴온 턴오프가 성취되므로 고효율을 달성할 수 있다. 제안하는 컨버터를 5 kW급 시작품으로 검증하였다.