• Title/Summary/Keyword: Wide Bandwidth

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Bandwidth Redistribution Based Fairness Control Method for the IEEE 802.17 Resilient Packet Ring (IEEE 802.17 레질런트 패킷링을 위한 대역폭 재분배 기반 공정성 제어 방식)

  • Kim, Tae-Joon;Kim, Hwang-Rae
    • Journal of Korea Multimedia Society
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    • v.9 no.7
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    • pp.844-853
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    • 2006
  • The IEEE 802.17 Resilient Packet Ring (RPR) for future Local, Metropolitan, and Wide Area Networks was recently standardized, but it still suffer from delay jitter deterioration and even some bandwidth loss under unbalanced overload. In order to overcome these drawbacks, this paper proposes a bandwidth redistribution based fairness control method, compatible with the legacy one, in which each congested node measures the amount of available bandwidth of its bottleneck link resulted from regulating upstream nodes' shares of the link bandwidth, calculates optimal fair rate with the number of uptream nodes requiring more bandwidth, and then redistributes the available bandwidth to the upstream nodes by advertising the rate. The performance evaluation results show that the proposed method fairly redistributes 95% of the bottleneck link bandwidth with even only two redistributions.

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A Fast Locking Dual-Loop PLL with Adaptive Bandwidth Scheme (루프 대역폭 조절기를 이용한 빠른 위상 고정 시간을 갖는 이중 루프 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.65-70
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    • 2008
  • A novel fast locking dual-loop integer-N phase locked loop(PLL) with adaptive bandwidth scheme is presented. When the PLL is out-of-lock, bandwidth becomes much wider than 1/10 of channel spacing with the wide bandwidth loop. When the PLL is near in-lock, bandwidth becomes narrower than 1/10 of channel spacing with the narrow bandwidth loop. The proposed PLL is designed based on a $0.35{\mu}m$ CMOS process with a 3.3V supply voltage. Simulation results show the fast look time of $50{\mu}s$ for an 80MHz frequency jump in a 200KHz channel spacing PLL with almost 14 times wider bandwidth than the channel spacing.

Development of PALplus Digital Decoder System for the European 2nd Generation Wide TV (유럽향 2세대 Wide TV용 PALplus 디지털 디코더 시스템의 개발)

  • 김정훈;이민승;정태홍;송동일;이명호
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1997.11a
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    • pp.101-106
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    • 1997
  • Palplus system is a new European 16:9 wide screen TV format which has a full compatibility with standard PAL and the system has a advantage of improving picture quality by the reduction of cross color and cross luminance as well as making use of the full horizontal luminance bandwidth of the PAL system. We implemented European 16:9 PALplus Digital decoder(625/50/2:1) system using SVP(Serial Video Processor) IC and discrete helper demodulator.

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Performance Analysis of Adaptive Bandwidth PLL According to Board Design (보드 설계에 따른 Adaptive Bandwidth PLL의 성능 분석)

  • Son, Young-Sang;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.146-153
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    • 2008
  • In this paper, a integrated phase-locked loop(PLL) as a clock multiphase generator for a high speed serial link is designed. The designed PLL keeps the same bandwidth and damping factor by using programmable current mirror in the whole operation frequency range. Also, the close-loop transfer function and VCO's phase-noise transfer function of the designed PLL are obtained with circuit netlists. The self impedance on board-mounted chip is calculated according to sizes and positions of decoupling capacitors. Especially, the detailed self-impedance analysis is carried out between frequency ranges represented the maximum gain in the close-loop transfer function and the maximum gain in the VCO's phase noise transfer function. We shows PLL's jitter characteristics by decoupling capacitor's sizes and positions from this result. The designed PLL has the wide operating range of 0.4GHz to 2GHz in operating voltage of 1.8V and it is designed 0.18-um CMOS process. The reference clock is 100MHz and PLL power consumption is 17.28mW in 1.2GHz.

Wide-Band Microstrip Patch Antenna Designs For LMDS Band (LMDS대역을 위한 광대역 마이크로스트립 패치 안테나 설계)

  • Lee, Hyeon-Jin;Kim, Tae-Hong;Im, Yeong-Seok
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.10
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    • pp.37-42
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    • 2000
  • There has been a constant effort to study methods for increasing the bandwidth of antenna by microstrip patch. In this paper, we propose a special type of the external rectangular patch, for design and analysis of an antenna using a local multi-point distribution system (LMDS). We minimized electromagnetic emissions from the fringing effect. As a result, we obtained an increase in antenna efficiency and frequency bandwidth. We were also able to design the wide band antenna easily, because of the difference in parameter between the aimed and the simulated antenna was reduced greatly. In comparison with the rectangular patch antenna, the banded one has a wider bandwidth.

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Artificial Bandwidth Extension Based on Harmonic Structure Extension and NMF (하모닉 구조 확장과 NMF 기반의 인공 대역 확장 기술)

  • Kim, Kijun;Park, Hochong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.197-204
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    • 2013
  • In this paper, we propose a new method for artificial bandwidth extension of narrow-band signal in frequency domain. In the proposed method, a narrow-band signal is decomposed into excitation signal and spectral envelope, which are extended independently in frequency domain. The excitation signal is extended such that low-band harmonic structure is maintained in high band, and the spectral envelope is extended based on sub-band energy using NMF. Finally, the spectral phase is determined based on signal correlation between frames in time domain, resulting in the final wide-band signal. The subjective evaluation verified that the wide-band signal generated by the proposed method has a higher quality than the original narrow-band signal.

Wide-bandwidth SQUID Current Amplifier and Control Electronics for X-ray Microcalorimeter (X-선 미소열량계 신호 검출을 위한 광대역 SQUID 전류증폭기와 조절 회로)

  • 김진목;이용호;권혁찬;김기웅;박용기
    • Progress in Superconductivity
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    • v.5 no.1
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    • pp.31-37
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    • 2003
  • Wide-bandwidth SQUID current amplifier and its control electronics have been constructed for detecting pulse outputs of a superconducting microcalorimeter. The current amplifier made of a double relaxation oscillation SQUID (DROS) has a bandwidth of 1.2 MHz and typical white noise level of about 6 pA/(equation omitted) Hz. To increase the dynamic range of the current amplifier, the flux-locked loop (FLL) has additional circuits to reset the integrator and to count reset numbers which present the number of passed flux quanta. In this system, dynamic range covers from -65 mA to +65 mA. SQUID electronics are controlled by software to get the optimum FLL condition, and to control the current to bias the transition edge sensor (TES). The electronics are shielded from the outside electromagnetic noises by using an aluminum case of 66 mm ${\times}$ 25 mm ${\times}$ 100 mm, and consist of 2 separate printed-circuit-boards for the current amplifier and the control electronics, respectively. The SQUID current amplifier and its control electronics will be used in TESs for detecting photons such as UV and X-ray with high energy resolution.

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A CMOS 5-bit 5GSample/Sec Analog-to-digital Converter in 0.13um CMOS

  • Wang, I-Hsin;Liu, Shen-Iuan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.1
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    • pp.28-35
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    • 2007
  • This paper presents a high-speed flash analog-to-digital converter (ADC) for ultra wide band (UWB) receivers. In this flash ADC, the interpolating technique is adopted to reduce the number of the amplifiers and a linear and wide-bandwidth interpolating amplifier is presented. For this ADC, the transistor size for the cascaded stages is inversely scaled to improve the trade-off in bandwidth and power consumption. The active inductor peaking technique is also employed in the pre-amplifiers of comparators and the track-and-hold circuit to enhance the bandwidth. Furthermore, a digital-to-analog converter (DAC) is embedded for the sake of measurements. This chip has been fabricated in $0.13{\mu}m$ 1P8M CMOS process and the total power consumption is 113mW with 1V supply voltage. The ADC achieves 4-bit effective number of bits (ENOB) for input signal of 200MHz at 5-GSample/sec.

Wide band prototype feedhorn design for ASTE focal plane array

  • Lee, Bangwon;Gonzales, Alvaro;Lee, Jung-won
    • The Bulletin of The Korean Astronomical Society
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    • v.41 no.2
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    • pp.66.2-66.2
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    • 2016
  • KASI and NAOJ are making collaborating efforts to implement faster mapping capability into the new 275-500 GHz Atacama Submillimeter Telescope Experiment focal plane array (FPA). Feed horn antenna is one of critical parts of the FPA. Required fractional bandwidth is almost 60 % while that of traditional conical horn is less than 50 %. Therefore, to achieve this wideband performance, we adopted a horn of which the corrugation depths have a longitudinal profile. A profiled horn has features not only of wide bandwidth but also of shorter length compared to a linear-tapered corrugated horn, and lower cost fabrication with less error can be feasible. In our design process the flare region is represented by a cubic splined curve with several parameters. Parameters of the flare region and each dimension of the throat region are optimized by a differential evolution algorithm to keep >20 dB return loss and >30 dB maximum cross-polarization level over the operation bandwidth. To evaluate RF performance of the horn generated by the optimizer, we used a commercial mode matching software, WASP-NET. Also, Gaussian beam (GB) masks to far fields were applied to give better GB behavior over frequencies. The optimized design shows >23 dB return loss and >33 dB maximum cross-polarization level over the whole band. Gaussicity of the horn is over 96.6 %. The length of the horn is 12.5 mm which is just 57 % of the ALMA band 8 feed horn (21.96 mm).

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The Analysis of the Effect of Narrowband Interference on UWB communication system (UWB(Ultra-Wide Bandwidth) 통신 시스템에서 협대역 간섭 잡음 해석)

  • 박장우
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.6
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    • pp.1153-1160
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    • 2003
  • In this paper, the performance of the UWB communication systems is analyzed in the presence of the Narrow Band Interference(NBI). UWB communication systems are modeled as using the Pulse Position Modulation(PPM). In this system, a Gaussian monocycle is used as the received pulses. The NBI is considered as a zero-mean random process with a constant spectral power density over its whole bandwidth. We obtain the mathematical expressions for describing the effect of the NBI on the UWB system. And it can be shown that the suppression of the effect of NBI on the UWB systems is available by adjusting the PPM related parameter.