• 한국전기전자재료학회논문지
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• 제23권9호
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• 한국자기학회지
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• 제26권2호
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• pp.62-66
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• 2016

포탄에 묻혀있는 탐지코일에서 유도되는 전압으로부터 총구를 떠나는 포탄의 초기속도를 계산하기 위하여 링 형태의 자석, 요크 및 탐지코일로 모델을 구성하였다. 자기장 해석에 의해 탐지코일의 유도전압에서 구한 마스터 곡선으로부터 포탄의 초기속도를 구할 수 있다. 탐지코일의 유도전압은 포탄에 묻혀있는 탐지코일 직경의 크기에 영향을 받는데, 직경의 크기가 증가하면 유도전압도 비례하여 증가한다. 탐지코일에서 유도되는 전압의 직경 효과를 감안한 초기속도 변화에 대한 정보를 입력하면 목표에서 포탄이 정확하게 폭발할 수 있다.

• Journal of Magnetics
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• 제18권2호
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• pp.90-94
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• 2013

We designed a model composed of a ring type magnet, a yoke, and a sensing coil embedded in a projectile for simulating the muzzle velocity. The muzzle velocity was obtained from the master curve for the induced voltage at sensing coil and the velocity as the projectile pass through the magnetic field. The induced voltage and the projectile's velocity are fitted by the $2^{nd}$ order polynomial. The skin effect difference between projectiles which consist of aluminum-aluminum and aluminum-steel was small. The projectile will surely be burst at the pre-determined target area using the flight time and the projectile muzzle velocity calculated from the voltage induced at the sensing coil on the projectile.

• 전력전자학회논문지
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• 제19권6호
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• pp.522-529
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• 2014

This study proposes an isolation amplifier circuit for the sensing and feedback of inverter DC-link voltage, which is inevitable for the precise control of inverter output voltage. The isolation amplifier consists of a pulse-width modulator and a pulse transformer with dual secondary windings. The accuracy of the proposed circuit depends on the precise matching of filter parameters in dual secondary circuits. The influences of parameter inaccuracy on the amplifier performances are analyzed. A modified circuit is proposed to reduce the dependency on filter parameters. The validity of the proposed method is verified through simulation and experiment.

• Transactions on Electrical and Electronic Materials
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• 제14권5호
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• pp.235-241
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• 2013

A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

• 한국전기전자재료학회논문지
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• 제20권10호
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• pp.912-917
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• 2007

Many electrochemical power devices such as solid state batteries and solid oxide fuel cell have been studied and developed for solving energy and environmental problems. An amperometric gas sensor usually generates sensing signal of electric current along the proportion of the concentration of target gas under the condition of limiting current. For narrow variations of gas concentration, the amperometric gas sensor can show higher precision than a potentiometric gas sensor does. In additional, cross sensitivities to interfering gases can possibly be mitigated by choosing applied voltage and electrode materials properly. In order to improve the sensitivity to $NO_2$, the device was attached with Au reference electrode to form the amperometric gas sensor device with three electrodes. With the fixed bias voltage being applied between the sensing and counter electrodes, the current between the sensing and reference electrodes was measured as a sensing signal. The response to $NO_2$ gas was obviously enhanced and suppressed with a positive bias, respectively, while the reverse current occurred with a negative bias. The way to enhance the sensitivity of $NO_2$ gas sensor was thus realized. It was shown that the response to $NO_2$ gas could be enhanced sensitivity by changing the bias voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권2호
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• pp.67-75
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• 2007

To improve low sense margin at low voltage, we propose a negatively driven sensing (NDS) scheme and to solve the problem of WL-to-BL short leakage fail, a variable bitline reference scheme with free-level precharged bitline (FLPB) scheme is adopted. The influence of the threshold voltage offset of NMOS and PMOS transistors in a latch type sense amplifier is very important factor these days. From evaluating the sense amplifier offset voltage distribution of NMOS and PMOS, it is well known that PMOS has larger distribution in threshold voltage variation than that of NMOS. The negatively-driven sensing (NDS) scheme enhances the NMOS amplifying ability. The offset voltage distribution is overcome by NMOS activation with NDS scheme first and PMOS activation followed by time delay. The sense amplifier takes a negative voltage during the sensing and amplifying period. The negative voltage of NDS scheme is about -0.3V to -0.6V. The performance of the NDS scheme for DRAM at the gigabit level has been verified through its realization on 1-Gb DDR2 DRAM chip.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.932-933
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• 2015

This paper presents methods to achieve and control accurate output voltage. PSR removed secondary output voltage sensing circuit, therefore standby power loss can be decreased. When sensing the auxiliary winding voltage, sensing must be done at accurate branch which has $V_O$ information. For this reason this paper presents the PSR sensing technique using sawtooth wave and peak detector. Circuit verification carried out with Spectre in Cadence corporation and Manga/Hynix $0.35{\mu}m$ 700V process.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.110-116
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• 2004

We propose a novel sensing scheme, which operates by sensing the difference in voltage between a memory cell and a reference cell for a magneto-resistive random access memory (MRAM). A new midpoint-reference generation circuit is adopted for the reference cell to improve the sensing margin and to guarantee correct operation of sensing circuit for wide range of tunnel magneto resistance (TMR) voltages. In this scheme, the output voltage of the reference cell becomes nearly the midpoint between the cell voltages of high and low states even if the voltage across the magnetic tunnel junction (MTJ) varies.

• Transactions on Electrical and Electronic Materials
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• 제17권5호
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• pp.302-305
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• 2016

In this paper, a low on-resistance and high current driving capability trench gate power metal-oxide-semiconductor field-effect transistor (MOSFET) incorporating a current sensing feature is proposed and evaluated. In order to realize higher cell density, higher current driving capability, cost-effective production, and higher reliability, self-aligned trench etching and hydrogen annealing techniques are developed. While maintaining low threshold voltage and simultaneously improving gate oxide integrity, the double-layer gate oxide technology was adapted. The trench gate power MOSFET was designed with a 0.6 μm trench width and 3.0 μm cell pitch. The evaluated on-resistance and breakdown voltage of the device were less than 24 mΩ and 105 V, respectively. The measured sensing ratio was approximately 70:1. Sensing ratio variations depending on the gate applied voltage of 4 V ~ 10 V were less than 5.6%.