• 한국정보통신학회논문지
• /
• 제18권5호
• /
• pp.1155-1161
• /
• 2014

본 논문에서는 DC-DC 부스트 컨버터의 최소 입력전압을 250mV 까지 낮출 수 있도록 하는 저전압 스타트업 전압 발생기를 제안 하였다. 제안된 스타트업 전압 발생기는 250mV의 입력전압을 500mV 이상으로 승압시켜 커패시터에 충전한다. 이후, 커패시터에 저장된 전압으로 부스트 컨버터를 시동시킴으로써, 250mV의 낮은 입력 전압에서도 부스트 컨버터가 동작을 시작할 수 있도록 하였다. 부스트 컨버터가 정상 동작한 후에는, 부스트 컨버터에 의하여 만들어지는 승압된 출력전압을 다시 부스트 컨버터의 전원으로 사용하게 함으로써, 스타트업 동작 후에는 기존 부스트 컨버터와 동일한 높은 전력 변환 효율로 동작 하도록 하였다. 제안된 스타트업 전압 발생기는 낮은 입력전압에서 트랜지스터의 바디전압을 조절하여 트랜지스터의 문턱전압을 낮춤으로써, 입력전압을 승압시키는 딕슨 차지펌프에 높은 클럭 주파수와 큰 전류를 공급하도록 하였다. 제안된 스타트업 전압 발생기는 $0.18{\mu}m$ CMOS 공정으로 제작되었으며, 250mV의 입력전압에서 생성된 클럭 주파수와 출력전압은 각각 34.5kHz와 522mV였다.

• 전기학회논문지P
• /
• 제57권3호
• /
• pp.265-269
• /
• 2008

Output voltage value of AC high voltage source has usually been obtained by measuring the low arm voltage of high voltage divider or the secondary voltage of high voltage transformer. In this study, we have fabricated the AC 400 kV high voltage divider using high voltage electrode and electric field measurement sensor. The dividing ratio of the fabricated 400 kV high voltage divider was evaluated using reference 400 kV capacitive divider. The dividing ratio of 400 kV high voltage divider is found to be 12,322 and has the good linearity within 0.63 % against AC high voltage up to 400 kV. Therefore, the developed 400 kV high voltage divider could evaluate 400 kV high voltage supply and voltage divider used in industry.

• 한국전기전자재료학회논문지
• /
• 제29권11호
• /
• pp.681-684
• /
• 2016

This research was carried out experiments of variety IGBTs for industrial inverter and electric vehicle. The devices for this paper were planar gate IGBT, trench gate IGBT and dual gate IGBT and we designed using same design and process parameters. As a result of experiments, the electrical characteristics of planar gate IGBT were 1,459 V of breakdown voltage, 4.04 V of threshold voltage and 4.7 V of on-state voltage drop. And the electrical characteristics of trench gate IGBT were 1,473 V of breakdown voltage, 4.11 V of threshold voltage and 3.17 V of on-state voltage drop. Lastly, the electrical characteristics of dual gate IGBT were 1,467 V of breakdown voltage, 4.14 V of threshold voltage and 3.08V of on-state voltage drop. We almost knew that the trench gate IGBT was superior to dual gate IGBT in terms of breakdown voltage. On the other hand, the dual gate IGBT was better than the trench gate IGBT in terms of on state voltage drop.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제51권11호
• /
• pp.541-545
• /
• 2002

This paper proposes the new narrow erase method to erase wall charges formed in an AC plasma display panel (PDP) cell. In the proposed method, pulse timing of switch at the sustain period is adjusted for inducing, a weak discharge. Then, after the narrow erase, the voltage of the X electrode is set to differ from that of the Y electrode. For the proposed method, the measured maximum address voltage margin was 38.3V at Y_Rest voltage of 100V and sustain voltage of 180${\sim}$185V. However, for the conventional method, in which the X and Y electrodes are set to be of equal voltage after the narrow erase, the measured maximum address voltage margin was 31.3V at Y_Rest voltage of 150V and sustain voltage of 180V. This result shows that the measured maximum voltage margin for the proposed method is about 7V(22%) higher than that for the conventional method.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2019년도 춘계학술대회
• /
• pp.323-324
• /
• 2019

Ge-MONOS(Metal-Oxide-Nitride-Oxide-Silicon) 구조를 가진 플레쉬 메모리 소자에 대해 프로그래밍 전압에 따른 문턱 전압의 변화를 조사했다. 프로그래밍 전압은 10V, 12V, 15V, 16V, 17V을 인가하였고 1초 동안 프로그래밍을 진행했다. 10V에서 12V까지는 문턱전압은 약 0.5V로 프로그램 전과 크게 다르지 않고, 15V, 16V, 17V에서 문턱전압이 각각 1.25V, 2.01V, 3.84V로 프로그램 전과 0.75V, 1.49V, 3.44V 차이가 발생했다.

• ETRI Journal
• /
• 제37권5호
• /
• pp.961-971
• /
• 2015

This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

• 전기학회논문지P
• /
• 제57권1호
• /
• pp.1-5
• /
• 2008

The output voltage value of AC high voltage source has been usually obtained by multiplying low voltage value measured at both terminals of low voltage resistor by the dividing ratio of the high voltage capacitive divider. From the dividing ratio determined of each 200 kV capacitive divider, we have developed step-up method for measuring the output voltage up to 400 kV using two same type of 200 kV capacitive dividers connected in series. The theoretical dividing ratio of 400 kV capacitive dividers connected in series coincides with that of manufacturer's certification within measurement uncertainty. Thus, this developed step-up method makes it possible to extend the range of output voltage from 200 kV to 400 kV. Furthermore, The dividing ratio of divider under test obtained using this step-up method is consistent with that obtained using one 200 kV high voltage divider within corresponding uncertainties.

• 전기학회논문지
• /
• 제61권5호
• /
• pp.711-716
• /
• 2012

To assess the insulation deterioration of stator windings, diagnostic and AC breakdown tests were performed on the eleven high voltage (HV) motors rated at 6kV. After completing the diagnostic tests, the AC overvoltage test was performed by gradually increasing the voltage applied to the stator windings until electrical insulation failure occurred, to obtain the breakdown voltage. Stator winding of motors 1, 3, and 8 failed at above rated voltage at 14 kV, 13.8kV, and 16.4kV, respectively. The breakdown voltage of three motors was higher than expected for good quality windings in 6kV motors. Based on deterioration evaluation criteria, the stator winding insulation of eleven HV motors are confirmed to be in good condition. The turning point of the current, $P_{i2}$, in the AC current vs. voltage characteristics occurred between 5kV and 6kV, and the breakdown voltage was low between 13.8kV and 16.4kV. There was a strong correlation between the breakdown voltage and various electrical characteristics in diagnostic tests including Pi2.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2013년도 추계학술대회
• /
• pp.375-378
• /
• 2013

본 논문에서는 EEPROM이나 MTP 등의 NVM 메모리 IP 설계에 필요로 하는 PVT(Process-Voltage-Temperature) 변동에 둔감한 기준전압(Reference Voltage) 회로를 설계하였다. 매그나칩반도체 $0.18{\mu}m$ EEPROM 공정을 이용하여 설계된 BGR(Bandgap Reference Voltage) 회로는 wide swing을 갖는 캐스코드 전류거울 (cascode current-mirror) 형태의 저전압 밴드갭 기준전압발생기 회로를 사용하였으며, PVT 변동에 둔감한 기준전압 특성을 보이고 있다. 최소 동작 전압은 1.43V이고 VDD 변동에 대한 VREF 민감도(sensitivity)는 0.064mV/V이다. 그리고 온도 변동에 대한 VREF 민감도는 $20.5ppm/^{\circ}C$이다. 측정된 VREF 전압은 평균 전압이 1.181V이고 $3{\sigma}$는 71.7mV이다.

• 전기학회논문지
• /
• 제58권2호
• /
• pp.285-291
• /
• 2009

In this paper, comparative analysis of offset voltage PWM method and $V_{max}-V_{mid}$ PWM method for three-phase matrix converter is addressed by using a simple analytical and graphical method. Offset voltage PWM method calculates PWM patterns in terms of offset voltage and variable slope of carrier, and it simplifies matrix converter modulation algorithm significantly. $V_{max}-V_{mid}$ PWM method generates patterns by using two phases and maintaining a remaining phase to base phase, and it is implemented in the industrial products. The most important performance criterion of modulation method is a magnitude of current ripples and it is analytically modelled. The graphical illustration of theses complex multivariable functions make per-carrier cycle and per fundamental cycle behavior of two PWM methods understood. Two modulation methods are analysed with the analytical formulas and graphics, and the analysis shows offset voltage PWM method is superior to $V_{max}-V_{mid}$ PWM method with respect to input current ripples and output voltage ripples.