• Journal of Welding and Joining
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• 제30권3호
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• pp.26-31
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• 2012

Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.130-135
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• 2023

Plasma-resistant ceramic (PRC) is a material used to prevent internal damage in plasma processing equipment for semiconductors and displays. The challenge is to suppress particles falling off from damaged surfaces and increase retention time in order to improve productivity and introduce the latest miniaturization process. Here, we confirmed the effect of suppressing plasma deterioration and reducing the etch rate through surface treatment of existing PRC with an initial illumination level of 200 nm. In particular, quartz glass showed a decrease in etch rate of up to 10%. Furthermore, it is believed that micro-scale secondary particles formed on the microstructure of each material grow as crystals during the fluoridation process. This is a factor that can act as a killer defect when dropped, and is an essential consideration when analyzing plasma resistance. The plasma etching suppression effect of the initial illumination is thought to be due to partial over etching at the dihedral angle of the material due to the sputtering of re-emission of Ar+-based cations. This means that plasma damage due to densification can also be interpreted in existing PRC studies. The research results are significant in that they present surface treatment conditions that can be directly applied to existing PRC for mass production and a new perspective to analyze plasma resistance in addition to simple etching rates.

• 마이크로전자및패키징학회지
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• 제12권2호
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• pp.111-119
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• 2005

직경 $75{\mu}m$ 높이 $90{\mu}m$및 $150{\mu}m$ 피치의 Cu via를 통한 삼차원 배선구조를 갖는 스택 시편을 deep RIE를 이용한 via hole 형성공정 , 펄스-역펄스 전기도금법에 의한 Cu via filling 공정, CMP를 이용한 Si thinning 공정, photholithography, 금속박막 스퍼터링, 전기도금법에 의한 Cu/Sn 범프 형성공정 및 플립칩 공정을 이용하여 제작하였다. Cu via를 갖는 daisy chain 시편에서 측정한 접속범프 개수에 따른 daisy chain의 저항 그래프의 기울기로부터 Cu/Sn 범프 접속저항과 Cu via 저항을 구하는 것이 가능하였다. $270^{\circ}C$에서 2분간 유지하여 플립칩 본딩시 $100{\times}100{\mu}m$크기의 Cu/Sn 범프 접속저항은 6.7 m$\Omega$이었으며, 직경 $75 {\mu}m$, 높이 $90{\mu}m$인 Cu via의 저항은 2.3m$\Omega$이었다.

• Journal of Welding and Joining
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• 제24권2호
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• pp.64-70
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• 2006

The 3-dimensional (3D) chip stacking technology is a leading technology to realize a high density and high performance system in package (SiP). There are several kinds of methods for chip stacking, but the stacking and interconnection through Cu filled through-hole via is considered to be one of the most advanced stacking technologies. Therefore, we studied the optimum process of through-hole via formation and Cu filling process for Si wafer stacking. Through-hole via was formed with DRIE (Deep Reactive ion Etching) and Cu filling was realized with the electroplating method. The optimized conditions for the via formation were RE coil power of 200 W, etch/passivation cycle time of 6.5 : 6 s and SF6 : C4F8 gas flow rate of 260 : 100 sccm. The reverse pulsed current of 1.5 A/dm2 was the most favorable condition for the Cu electroplating in the via. The Cu filled Si wafer was chemically and mechanically polished (CMP) for the following flip chip bumping technology.

• 전기전자학회논문지
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• 제12권3호
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• pp.138-143
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• 2008

본 논문에서 기존 반도체공정들이 갖는 리소그래피와 식각 등의 공정단계를 배제하는 direct-write 공정과 LAM(Laser Ablation of Microparticles) 공정을 이용하여 친환경적인 이점을 가질 수 있는 나선형 인덕터의 구조를 제안하고 주파수 특성을 확인하였다. 인덕터의 구조는 Si를 540${\mu}m$, $SiO_2$를 3${\mu}m$으로 하였으며, Cu 코일의 폭과 선간의 간격은 LAM 공정과 direct-write 공정을 이용할 수 있도록 각각 30${\mu}m$으로 설정하여 2회 권선하였다. 나선형 박막 인덕터의 성능을 나타내는 인덕턴스, quality-factor, SRF에 대한 주파수 특성을 HFSS로 시뮬레이션 하였다. Underpass와 via가 제거된 인덕터는 300-800MHz 범위에서 1.11nH의 인덕턴스, 5GHz에서 최대 38 정도의 품질계수를 가지며, SRF는 18GHz로 시뮬레이션 결과를 얻었다. 반면에 underpass와 via를 가지는 일반적인 인덕터는 300-800MHz 범위에서 1.12nH의 인덕턴스, 5GHz에서 최대 35 정도의 품질계수를 가지며, SRF는 16GHz로 시뮬레이션 결과를 얻을 수 있었다.

• 접착 및 계면
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• 제4권1호
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• pp.28-34
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• 2003

강철 타이어 코드의 접착력 향상을 위하여 아세틸렌 플라즈마 중합 코팅, 아르곤 에칭+아세틸렌 플라즈마 중합 코팅, 그리고 아르곤 에칭+담채를 이용한 아세틸렌 플라즈마 중합 코팅을 실시하였으며, 접착력은 TCAT시편으로 측정하였다. 플라즈마 중합 코팅된 타이어 코드의 내구성을 고찰하기 위하여 제 1 단계로 아세틸렌 플라즈마 중합 코팅된 타이어코드를 상온에서 1, 3, 5, 10, 15일 동안 방치한 후 TCAT 시편을 제조하여 접착력변화를 측정하였으며, 제 2 단계로는 플라즈마 중합 코팅된 코드로 TCAT 시편을 제조한 후 증류수, 10% NaCl 수용액에서 또는 $100^{\circ}C$ 오븐에서 1, 2, 3, 4주간 노화시키면서 접착력 변화를 측정하였다. SEM/EDX을 이용하여 코드의 파괴표면을 분석하였으며, 황동코팅과 비교 분석하였다. 아르곤 에칭+담채를 이용한 아세틸렌 플라즈마 중합으로 코팅된 강철 타이어 코드의 접착력은 황동코팅된 시편의 접착력과 거의 같은 수준이었다. 타이어 코드의 상온 노화시험에서 황동코팅된 시편이 아세틸렌 플라즈마 중합 코팅된 시편에 비하여 우수 내구성을 보여주었으나, TCAT 시편의 노화에서는 아세틸렌 플라즈마 중합 코팅이 황동코팅에 비하여 우수하거나 비슷한 결과를 보였다.

• Journal of Ceramic Processing Research
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• 제20권1호
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• pp.48-53
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• 2019

Carbon fiber reinforced SiC composites (C/SiC) have high-temperature stability and excellent thermal shock resistance, and are currently being applied in extreme environments, for example, as aerospace propulsion parts or in high-performance brake systems. However, their low thermal conductivity, compared to metallic materials, are an obstacle to energy efficiency improvements via utilization of regenerative cooling systems. In order to solve this problem, the present study investigated the bonding strength between carbon fiber and matrix material within ceramic matrix composite (CMC) materials, demonstrating the relation between the microstructure and bonding, and showing that the mechanical properties and thermal conductivity may be improved by treatment of the carbon fibers. When fiber surface was treated with a nitric acid solution, the observed segment crack areas within the subsequently generated CMC increased from 6 to 10%; moreover, it was possible to enhance the thermal conductivity from 10.5 to 14 W/m·K, via the same approach. However, fiber surface treatment tends to cause mechanical damage of the final composite material by fiber etching.

• 마이크로전자및패키징학회지
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• 제29권4호
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• pp.1-8
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• 2022

TSV 기술을 포함한 고밀도, 고집적 패키징 기술은 IoT, 6G/5G 통신, HPC (high-performance computing)등 여러 분야에서 중요한 기술로 여겨지고 있다. 2차원에서 고집적화를 달성하는 것은 물리적 한계에 도달하게 되었으며, 따라서 3D 패키징 기술을 위하여 다양한 연구들이 진행되고 있다. 본 고에서는 scallop의 형성 원인과 영향, 매끈한 측벽을 만들기 위한 scallop-free 에칭 기술, TSV 표면의 Cu bonding에 대해서 자세히 조사하였다. 이러한 기술들은 고품질 TSV 형성 및 3D 패키징 기술에 영향을 줄 것으로 예상한다.

• 한국세라믹학회지
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• 제46권1호
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• pp.30-34
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• 2009

A Sand blasting technology has been used to address via and trench processing of glass wafer of optic semiconductor packaging. Manufactured sand blast that is controlled by blast nozzle and servomotor so that 8" wafer processing may be available. 10mm sq test device manufactured by Dry Film Resist (DFR) pattern process on 8" glass wafer of $500{\mu}m's$ thickness. Based on particle pressure and the wafer transfer speed, etch rate, mask erosion, and vertical trench slope have been analyzed. Perfect 500 um tooling has been performed at 0.3 MPa pressure and 100 rpm wafer speed. It is particle pressure that influence in processing depth and the transfer speed did not influence.

• 통합자연과학논문집
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• 제8권3호
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• pp.147-152
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• 2015

Photoluminescent porous silicon (PSi) were prepared by an electrochemical etch of n-type silicon under the illumination with a 300 W tungsten filament bulb for the duration of etch. The red photoluminescence emitting at 620 nm with an excitation wavelength of 450 nm is due to the quantum confinement of silicon nanocrystal in porous silicon. As-prepared PSi was sonicated, fractured, and centrifuged in toluene to obtain photoluminescence silicon quantum dots. BET and BHJ methods were employed to study the specific surface area of as-prepared PSi. Optical characterization of red photoluminescent silicon nanocrystal was investigated by UV-vis and fluorescence spectrometer. Also SEM and TEM images of porous silicon and nanoparticles were investigated.