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http://dx.doi.org/10.4191/KCERS.2009.46.1.030

Optimization of Glass Wafer Dicing Process using Sand Blast  

Seo, Won (Department of Electronic Engineering, Kangnam University)
Koo, Young-Mo (ESIP Lab., EPworks Co., Ltd.)
Ko, Jae-Woong (Korea Institute of Materials Science)
Kim, Gu-Sung (Department of Electronic Engineering, Kangnam University)
Publication Information
Journal of the Korean Ceramic Society / v.46, no.1, 2009 , pp. 30-34 More about this Journal
Abstract
A Sand blasting technology has been used to address via and trench processing of glass wafer of optic semiconductor packaging. Manufactured sand blast that is controlled by blast nozzle and servomotor so that 8" wafer processing may be available. 10mm sq test device manufactured by Dry Film Resist (DFR) pattern process on 8" glass wafer of $500{\mu}m thickness. Based on particle pressure and the wafer transfer speed, etch rate, mask erosion, and vertical trench slope have been analyzed. Perfect 500 um tooling has been performed at 0.3 MPa pressure and 100 rpm wafer speed. It is particle pressure that influence in processing depth and the transfer speed did not influence.
Keywords
Sand blast; Glass wafer; Etching;
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Times Cited By KSCI : 1  (Citation Analysis)
Times Cited By SCOPUS : 0
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1 Rao R. Tummala, “Fundamentals of Microsystems Packaging,” pp. 24-26, Mc-Graw-Hill, New York, 2001.
2 Rao R. Tummala, “Ceramic and Glass-Ceramic Packaging in the 1990s,” J. Am. Ceram. Soc., 74 [5] 895-908 (1991).   DOI
3 Thomas J. Watson, “CMOS Image Sensors-recent Advances and Device Scal-ing Considerations,” IEDM '97. Technical Digest, 201-204 (1997).
4 J.G. Jang, H.W. Kim, “Fabrication and Characterization of Yellow OLED using GDI602:Rubrene(10%) Material(in Korean),” J. of Microelectronics & Packaging Soc., 13 [4] 71-5 (2006).   과학기술학회마을
5 Stewart, M. Howell, R.S. Pires, L. Hatalis, M.K., “Polysilicon TFT Technology for Active Matrix OLED Displays,” IEEE Trans. Electron devices, 48 [5] 845-51 (2001).   DOI   ScienceOn
6 S. M. SZE, “VLSI Technology, 2/E,” pp. 213-14, McGraw- Hill, New York, 1988.
7 W. Koechner, “Solid State Laser Engineering,” pp. 549-53, Springer-Verlag, Berlin, 2007.
8 R. Hippler, M. Schmidt, K. H. Schoen-bach, “Low Temperature Plasma Physics,” pp. 89-98, WILEY-VCH, New York 2001.
9 G. Y. Yeom, “Plasma Etching Technology(in Korean),” pp. 250-54, MiraeCom, Seoul, 2006.
10 Charles A. Harper, “Electronic Packaging And Interconnection Handbook,” pp. 1.59, McGraw-Hill, New York, 1991.