• 공업화학
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• 제20권6호
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• pp.617-621
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• 2009

Zinc oxide (ZnO)을 금(Au)과 fluorine-doped tin oxide (FTO) 촉매로 산화실리콘($SiO_2$) 기판에 산화아연입자 20 nm, $20{\mu}m$를 각각 사용하여 기체-액체-고체(VLS) 합성법으로 성장시켰다. 나노로드의 표면특성, 화학조성, 그리고 결정특성을 엑스레이회절(X-ray diffraction (XRD)), 에너지 분산형 X선 분광기(Energy-dispersive X-ray spectroscopy (EDX)), 표면 방출주사현미경(Field-emission scanning electron microscope (FE-SEM))으로 분석하였다. ZnO의 입자 크기 뿐만 아니라 결정형태가 성장에 크게 영향을 미쳤다. ZnO의 모든 나노구조가 6방정계(六方晶系), 단일결정구조를 가지고 있었다. 최적온도는 $1030^{\circ}C$, 입자크기는 20 nm이다. 그러므로 Au 대신 플루오린 첨가 도핑으로 전기음성도가 증가된 FTO 증착에 의해서 생성된 나노로드는 경제성 있는 대체물질로서의 가치가 있을 것으로 사료된다.

• 한국재료학회지
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• 제32권10호
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• pp.435-441
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• 2022

We report the synthesis and gas sensing properties of bare and ZnO decorated TeO₂ nanowires (NWs). A catalyst assisted-vapor-liquid-solid (VLS) growth method was used to synthesize TeO₂ NWs and ZnO decoration was performed using an Au-catalyst assisted-VLS growth method followed by a subsequent heat treatment. Structural and morphological analyses using X-ray diffraction (XRD) and scanning/transmission electron microscopies, respectively, demonstrated the formation of bare and ZnO decorated TeO₂ NWs with desired phase and morphology. NO₂ gas sensing studies were performed at different temperatures ranging from 50 to 400 ℃ towards 50 ppm NO₂ gas. The results obtained showed that both sensors had their best optimal sensing temperature at 350 ℃, while ZnO decorated TeO₂ NWs sensor showed much better sensitivity towards NO₂ relative to a bare TeO₂ NWs gas sensor. The reason for the enhanced sensing performance of the ZnO decorated TeO₂ NWs sensor was attributed to the formation of ZnO (n)/ TeO₂ (p) heterojunctions and the high intrinsic gas sensing properties of ZnO.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.409-409
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• 2014

Recently hexagonal boron nitride (h-BN), III-V compound of boron and nitrogen with strong covalent $sp^2$ bond, is a 2 dimensional insulating material with a large direct band gap up to 6 eV. Its outstanding properties such as strong mechanical strength, high thermal conductivity, and chemical stability have been reported to be similar or superior to graphene. Because of these excellent properties, h-BN can potentially be used for variety of applications such as dielectric layer, deep UV optoelectronic device, and protective transparent substrate. Ultra flat and charge impurity-free surface of h-BN is also an ideal substrate to maintain electrical properties of 2 dimensional materials such as graphene. To synthesize a single or a few layered h-BN, chemical vapor deposition method (CVD) has been widely used by using an ammonia borane as a precursor. Ammonia borane decomposes into hydrogen (gas), monomeric aminoborane (solid), and borazine (gas) that is used for growing h-BN layer. However, very active monomeric aminoborane forms polymeric aminoborane nanoparticles that are white non-crystalline BN nanoparticles of 50~100 nm in diameter. The presence of these BN nanoparticles following the synthesis has been hampering the implementation of h-BN to various applications. Therefore, it is quite important to grow a clean and high quality h-BN layer free of BN particles without having to introduce complicated process steps. We have demonstrated a synthesis of a high quality h-BN monolayer free of BN nanoparticles in wafer-scale size of $7{\times}7cm^2$ by using CVD method incorporating a simple filter system. The measured results have shown that the filter can effectively remove BN nanoparticles by restricting them from reaching to Cu substrate. Layer thickness of about 0.48 nm measured by AFM, a Raman shift of $1,371{\sim}1,372cm^{-1}$ measured by micro Raman spectroscopy along with optical band gap of 6.06 eV estimated from UV-Vis Spectrophotometer confirm the formation of monolayer h-BN. Quantitative XPS analysis for the ratio of boron and nitrogen and CS-corrected HRTEM image of atomic resolution hexagonal lattices indicate a high quality stoichiometric h-BN. The method presented here provides a promising technique for the synthesis of high quality monolayer h-BN free of BN nanoparticles.

• 공업화학
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• 제10권2호
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• pp.225-230
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• 1999

Li(DPM)을 원료로 hot wall 수평 관형 반응기를 이용하여 질소-산소 및 아르곤-산소의 분위기에서 $Li_2O$ 고체박막을 LPMOCVD법으로 합성하였다. XRD와 ESCA 분석으로부터 질소-산소 분위기에서는 $Li_2CO_3$막이, 아르곤-산소의 분위기에서는 $Li_2O$막이 성장하였음을 알아냈다. 성막된 산화리튬과 리튬카보네이트는 기판의 실리콘 성분과 반응하여 실리케이트를 형성하였다. 마이크로 trench법과 Monte Carlo 시뮬레이션에 의해 기상반응 속도상수 및 표면반응 속도상수가 얻어졌으며 이를 이용한 성막속도 계산치와 실험치를 비교한 결과 실험조건범위 내에서 잘 일치하였다.

• 대한기계학회논문집B
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• 제35권10호
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• pp.1089-1095
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• 2011

열전달 향상을 위한 방법으로 많이 사용되고 있는 마이크로 핀을 포함한 표면 위에서의 핵비등을 액상과 기상에서 질량 및 운동량, 에너지에 대한 지배 방정식을 풀어 수치해석을 수행하였다. 핵비등에서의 기포거동을 계산하기 위해 sharp-interface 레벨셋(level-set) 방법을 상변화 효과와 핀과 캐비티와 같은 잠긴 고체에서의 점착 조건 및 접촉각, 마이크로 액체층에서의 증발 열유속을 포함하도록 수정하였다. 핀과 캐비티를 포함한 표면에서의 기포 생성, 성장, 이탈에 대한 해석을 통하여 핀-캐비티 배열, 핀-핀 간격이 핵비등에서의 기포거동에 중요한 역할을 하는 것을 확인하였다.

• Journal of the Korean Physical Society
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• 제73권10호
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• pp.1444-1451
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• 2018

The surface-to-volume ratio of one-dimensional (1D) semiconductor metal-oxide sensors is an important factor for achieving good gas sensing properties because it offers a wide response area. To exploit this effect, in this study, we determined the optimal calcination temperature to maximize the specific surface area and thereby the sensitivity of the sensor. The $In_2O_3$ nanorods were synthesized by using vapor-liquid-solid growth of $In_2O_3$ powders and were decorated with the Pt nanoparticles by using a sol-gel method. Subsequently, the Pt nanoparticle-decorated $In_2O_3$ nanorods were calcined at different temperatures to determine the optimal calcination temperature. The $NO_2$ gas sensing properties of five different samples (pristine uncalcined $In_2O_3$ nanorods, Pt-decorated uncalcined $In_2O_3$ nanorods, and Pt-decorated $In_2O_3$ nanorods calcined at 400, 600, and $800^{\circ}C$) were determined and compared. The Pt-decorated $In_2O_3$ nanorods calcined at $600^{\circ}C$ showed the highest surface-to-volume ratio and the strongest response to $NO_2$ gas. Moreover, these nanorods showed the shortest response/recovery times toward $NO_2$. These enhanced sensing properties are attributed to a combination of increased surface-to-volume ratio (achieved through the optimal calcination) and increased electrical/chemical sensitization (provided by the noble-metal decoration).

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2001년도 추계학술발표회 초록집
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• pp.68-68
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• 2001

Thin films of polycrystalline silicon (poly-Si) is a promising material for use in large-area electronic devices. Especially, the poly-Si can be used in high resolution and integrated active-matrix liquid-crystal displays (AMLCDs) and active matrix organic light-emitting diodes (AMOLEDs) because of its high mobility compared to hydrogenated _amorphous silicon (a-Si:H). A number of techniques have been proposed during the past several years to achieve poly-Si on large-area glass substrate. However, the conventional method for fabrication of poly-Si could not apply for glass instead of wafer or quartz substrate. Because the conventional method, low pressure chemical vapor deposition (LPCVD) has a high deposition temperature ($600^{\circ}C-1000^{\circ}C$) and solid phase crystallization (SPC) has a high annealing temperature ($600^{\circ}C-700^{\circ}C$). And also these are required time-consuming processes, which are too long to prevent the thermal damage of corning glass such as bending and fracture. The deposition of silicon thin films on low-cost foreign substrates has recently become a major objective in the search for processes having energy consumption and reaching a better cost evaluation. Hence, combining inexpensive deposition techniques with the growth of crystalline silicon seems to be a straightforward way of ensuring reduced production costs of large-area electronic devices. We have deposited crystalline poly-Si thin films on soda -lime glass and SiOz glass substrate as deposited by PVD at low substrate temperature using high power, magnetron sputtering method. The epitaxial orientation, microstructual characteristics and surface properties of the films were analyzed by TEM, XRD, and AFM. For the electrical characterization of these films, its properties were obtained from the Hall effect measurement by the Van der Pauw measurement.

• 전기화학회지
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• 제12권2호
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• pp.189-195
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• 2009

고순도의 $\beta-Ga_{2}O_{3}$ 나노로드(nanorods)가 니켈산화물 나노입자를 촉매로 사용하고 갈륨금속분말을 원료물질로 이용하여 화학기상증착법으로 합성되었다. 전계방출형 주사전자현미경을 이용하여 $\beta-Ga_{2}O_{3}$ 나노로드를 관찰한 결과, 평균직경은 약 160 nm 그리고 평균길이는 $4{\mu}m$였으며 vaporsolid(VS) 성장기구를 통하여 성장되었음을 알 수 있었다. X-선 회절시험과 고분해능 투과전자 현미경을 이용한 결정구조 분석 결과, 합성된 나노로드의 내부는 단사정계 결정구조를 가지는 단결정의 $\beta-Ga_{2}O_{3}$로 이루어져 있고 외벽은 비정질 갈륨옥사이드로 이루어진 코어-셀 구조로 구성되어 있는 것을 확인하였다. 합성된 $\beta-Ga_{2}O_{3}$ 나노로드를 음극 활물질로 사용하여 전극을 제조하고 전기화학적 특성을 분석한 결과, 리튬/$\beta-Ga_{2}O_{3}$ 나노로드 전지는 첫 방전 시 867 mAh/g-$\beta-Ga_{2}O_{3}$의 높은 용량을 나타내었으나 초기 비가역 용량으로 인해 62%의 낮은 충 방전 효율을 나타내었다. 그러나 5 사이클 이후 높은 충 방전 효율을 보이며 30 사이클까지 안정된 사이클 특성을 나타내었다.

• 전기화학회지
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• 제3권4호
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• pp.200-203
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• 2000

Microwave plasma chemical vapor deposition을 이용하여 붕소가 도핑된 전도성 다이아몬드 박막을 제조하였다. 탄소원으로는 아세톤과 메탄올을 사용하였으며, 붕소원으로는 $B_2O_3$를 사용하고, 운반가스로는 수소를 사용하였다. 이때 붕소의 도핑농도는 약 $10^2ppm\;(B/C)$이였다. Si 기질 각 부분의 온도와 플라즈마에서의 거리를 다르게 하기 위해서 Si 기질을 배치함에 있어 약$10^{\circ}$를 기울여 다이아몬드 박막을 성장시켰다. 실험결과 모두 동일한 조건 이였으나 같은 Si 기질 위에 높이에 따른 온도구배가 형성되었으며, 그에 따라 다이아몬드의 결정 또한 각기 달랐다. 다이아몬드 박막에 나타난 결정형태의 분포는 약 $3\~4$부분으로 나뉘어 있었다 제조된 다이아몬드 박막의 특성을 확인하기 위해 Raman spectrum을 이용해 다이아몬드의 결정성을 확인하였고, 표면의 형태를 관찰하기 위해 현미경을 사용하였다. 입자의 크기는 각기 다른 Si기질의 높이에 의한 온도구배로 인하여, 기질의 높이에 따라 서서히 달라졌다. 다이아몬드 박막의 Raman spectrum측정결과 $1334cm^{-1}$에서 강한 peak가 발견되었으며, 이것은 결정성 다이아몬드의 일반적인 특성 이였다. Si 기질 중 낮은 곳에 위치한 부분의 Raman spectrum은 비다이아몬드의 peak인 $1550cm^{-1}$ 부근에서 넓게 peak가 상승된 것이 관찰되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.