• Title/Summary/Keyword: Underfill process

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Novel Bumping and Underfill Technologies for 3D IC Integration

  • Sung, Ki-Jun;Choi, Kwang-Seong;Bae, Hyun-Cheol;Kwon, Yong-Hwan;Eom, Yong-Sung
    • ETRI Journal
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    • v.34 no.5
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    • pp.706-712
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    • 2012
  • In previous work, novel maskless bumping and no-flow underfill technologies for three-dimensional (3D) integrated circuit (IC) integration were developed. The bumping material, solder bump maker (SBM) composed of resin and solder powder, is designed to form low-volume solder bumps on a through silicon via (TSV) chip for the 3D IC integration through the conventional reflow process. To obtain the optimized volume of solder bumps using the SBM, the effect of the volumetric mixing ratio of resin and solder powder is studied in this paper. A no-flow underfill material named "fluxing underfill" is proposed for a simplified stacking process for the 3D IC integration. It can remove the oxide layer on solder bumps like flux and play a role of an underfill after the stacking process. The bumping process and the stacking process using the SBM and the fluxing underfill, respectively, for the TSV chips are carefully designed so that two-tier stacked TSV chips are sucessfully stacked.

Studies on Flip Chip Underfill Process by using Molding System (몰딩공정을 응용한 플립칩 언더필 연구)

  • 한세진;정철화;차재원;서화일;김광선
    • Journal of the Semiconductor & Display Technology
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    • v.1 no.1
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    • pp.29-33
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    • 2002
  • In the flip-chip process, the problem like electric defect or fatigue crack caused by the difference of CTE, between chip and substrate board had occurred. Underfill of flip chip to overcome this defects is noticed as important work developing in whole reliability of chip by protecting the chip against the external shock. In this paper, we introduce the underfill methods using mold and plunge and improvement of process and reliability, and the advantage which can be taken from embodiment of device.

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Interconnection Technology Based on InSn Solder for Flexible Display Applications

  • Choi, Kwang-Seong;Lee, Haksun;Bae, Hyun-Cheol;Eom, Yong-Sung;Lee, Jin Ho
    • ETRI Journal
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    • v.37 no.2
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    • pp.387-394
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    • 2015
  • A novel interconnection technology based on a 52InSn solder was developed for flexible display applications. The display industry is currently trying to develop a flexible display, and one of the crucial technologies for the implementation of a flexible display is to reduce the bonding process temperature to less than $150^{\circ}C$. InSn solder interconnection technology is proposed herein to reduce the electrical contact resistance and concurrently achieve a process temperature of less than $150^{\circ}C$. A solder bump maker (SBM) and fluxing underfill were developed for these purposes. SBM is a novel bumping material, and it is a mixture of a resin system and InSn solder powder. A maskless screen printing process was also developed using an SBM to reduce the cost of the bumping process. Fluxing underfill plays the role of a flux and an underfill concurrently to simplify the bonding process compared to a conventional flip-chip bonding using a capillary underfill material. Using an SBM and fluxing underfill, a $20{\mu}m$ pitch InSn solder SoP array on a glass substrate was successfully formed using a maskless screen printing process, and two glass substrates were bonded at $130^{\circ}C$.

Epoxy-based Interconnection Materials and Process Technology Trends for Semiconductor Packaging (반도체 패키징용 에폭시 기반 접합 소재 및 공정 기술 동향)

  • Eom, Y.S.;Choi, K.S.;Choi, G.M.;Jang, K.S.;Joo, J.H.;Lee, C.M.;Moon, S.H.;Moon, J.T.
    • Electronics and Telecommunications Trends
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    • v.35 no.4
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    • pp.1-10
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    • 2020
  • Since the 1960s, semiconductor packaging technology has developed into electrical joining techniques using lead frames or C4 bumps using tin-lead solder compositions based on traditional reflow processes. To meet the demands of a highly integrated semiconductor device, high reliability, high productivity, and an eco-friendly simplified process, packaging technology was required to use new materials and processes such as lead-free solder, epoxy-based non cleaning interconnection material, and laser based high-speed processes. For next generation semiconductor packaging, the study status of two epoxy-based interconnection materials such as fluxing and hybrid underfills along with a laser-assisted bonding process were introduced for fine pitch semiconductor applications. The fluxing underfill is a solvent-free and non-washing epoxy-based material, which combines the underfill role and fluxing function of the Surface Mounting Technology (SMT) process. The hybrid underfill is a mixture of the above fluxing underfill and lead-free solder powder. For low-heat-resistant substrate applications such as polyethylene terephthalate (PET) and high productivity, laser-assisted bonding technology is introduced with two epoxy-based underfill materials. Fluxing and hybrid underfills as next-generation semiconductor packaging materials along with laser-assisted bonding as a new process are expected to play an active role in next-generation large displays and Augmented Reality (AR) and Virtual Reality (VR) markets.

Flow Characteristics and Filling Time Estimation for Underfill Process (언더필 공정에 대한 유동 특성과 침투 시간 예측 연구)

  • Sim, Hyung-Sub;Lee, Seong-Hyuk;Kim, Jong-Min;Shin, Young-Eui
    • Journal of Welding and Joining
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    • v.25 no.3
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    • pp.45-50
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    • 2007
  • The present study is devoted to investigate the transient flow and to estimate the filling time fur underfill process by using the numerical model established on the fluid momentum equation. For optimization of the design and selection of process parameters, this study extensively presents an estimation of the filling time in the view points of some important factors related to underfill materials and flip-chip geometry. From the results, we conclude that the filling time changes with respect to the under fill materials because of different viscosity, surface tension coefficient and contact angle. It reveals that, as the gap height increases, the filling time decreases substantially, and goes to the saturated values.

Evaluation of Thermal Property and Fluidity with Underfill for BGA Package (BGA 패키지를 위한 언더필의 열적 특성과 유동성에 관한 연구)

  • Noh, Bo-In;Lee, Bo-Young;Kim, Soo-Jung;Jung, Seung-Boo
    • Journal of Welding and Joining
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    • v.24 no.2
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    • pp.57-63
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    • 2006
  • In this study, the curing kinetics and thermal degradation of underfill were investigated using differential scanning calorimetry (DSC) and thermo gravimetry analysis (TGA). The mechanical and thermal properties of underfill were characterized using dynamic mechanical analysis (DMA) and thermo-mechanical analysis (TMA). Also, we presented on underfill dispensing process using Prostar tool. The non-isothermal DSC scans at various heating rates, the exothermic reaction peak became narrower with increasing the heating rate. The thermal degradation of underfill was composed of two processes, which involved chemical reactions between the degrading polymer and oxygen from the air atmosphere. The results of fluidity phenomena were simulated using Star CD program, the fluidity of the underfills with lower viscosity was faster.

Visualization for racing effect and meniscus merging in underfill process (언더필 공정에서 레이싱 효과와 계면 병합에 대한 가시화)

  • Kim, Young Bae;Kim, Sungu;Sung, Jaeyong;Lee, MyeongHo
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.4
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    • pp.351-357
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    • 2013
  • In flip chip packaging, underfill process is used to fill epoxy bonder into the gap between a chip and a substrate in order to improve the reliability of electronic devices. Underfill process by capillary motion can give rise to unwanted air void formations since the arrangement of solder bumps affects the interfacial dynamics of flow meniscus. In this paper, the unsteady flows in the capillary underfill process are visualized and then the racing effect and merging of the meniscus are investigated according to the arrangement of solder bumps. The result is shown that at higher bump density, the fluid flow perpendicular to the main direction of flow becomes stronger so that more air voids are formed. This phenomenon is more conspicuous at a staggered bump array than at a rectangular bump array.

Fine-Pitch Solder on Pad Process for Microbump Interconnection

  • Bae, Hyun-Cheol;Lee, Haksun;Choi, Kwang-Seong;Eom, Yong-Sung
    • ETRI Journal
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    • v.35 no.6
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    • pp.1152-1155
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    • 2013
  • A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

Flow Properties of Liquid Epoxy Compounds as a Function of Filler Fraction for the Underfill (Underfill용 액상 Epoxy Compound의 Filler 충진에 따른 Flow특성 연구)

  • 김원호;황영훈;배종우;정혜욱
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.2
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    • pp.21-27
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    • 2000
  • To develop the underfill materials which are required for the new process of semi-conductor industry, the properties of epoxy/anhydride/cobalt(II) catalyst system with two types of fused silica(1 $\mu\textrm{m}$, 8 $\mu\textrm{m}$) are studied as a function of filler fraction. According to the curing profile, the optimum catalyst amount was 1.0 wt% for full curing at the conditions of $160^{\circ}C$/l5 min., and we could conclude that the viscosity has superior effect on the real flaw through the relationship between surface tension and viscosity data. The underfills which were filled with 1 $\mu\textrm{m}$ fused silica did not show good flowability, but they should be useful by improving the viscosity for a future process which has small gaps. The underfills which were filled with 8 $\mu\textrm{m}$ fused silica showed good flowability when the filler contents were 55~60 vol%. The model which was referred by Matthew can predict the real flow length only when the underfill has high viscosity and low surface tension.

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Board Level Reliability Evaluation for Package on Package

  • Hwang, Tae-Gyeong;Chung, Ji-Young
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2007.04a
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    • pp.37-47
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    • 2007
  • Factor : Structure Metal pad & SMO size Board level TC test : - Large SMO size better Board level Drop test : - Large SMO size better Factor : Structure Substrate thickness Board level TC test : - Thick substrate better Board level Drop test : - Substrate thickness is not a significant factor for drop test Factor : Material Solder alloy Board level TC test : - Not so big differences over Pb-free solder and NiAu, OSP finish Board level Drop test : - Ni/Au+SAC105, CuOSP+LF35 are better Factor : Material Pad finish Board level TC test : - NiAu/NiAu is best Board livel Drop test : - CuOSP is best Factor : Material Underfill Board level TC test - Several underfills (reworkable) are passed TCG x500 cycles Board level Drop test : - Underfill lots have better performance than non-underfill lots Factor : Process Multiple reflow Board level TC test : - Multiple reflow is not a significant actor for TC test Board level Drop test : N/A Factor : Process Peak temp Board level TC test : - Higher peak temperature is worse than STD Board level Drop test : N/A Factor : Process Stack method Board level TC test : - No big difference between pre-stack and SMT stack Board level Drop test : - Flux dipping is better than paste dipping but failure rate is more faster

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