• Journal of Power Electronics
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• v.18 no.2
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• pp.640-650
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• 2018

A TRIAC dimmable LED driver with a wide tuning range and a two-stage uniform dimming scheme is proposed in this paper. To solve the restricted dimming range problem caused by the limited conduction ratio of TRIAC dimmers, a conduction ratio compensation technique is introduced, which can increase the output current up to the rated output current when the TRIAC dimmer turns to the maximum conduction ratio. For further optimization, a two-stage uniform dimming diagram with a rapid dimming curve and a slow dimming curve is designed to make the LED driver regulated visually uniform in the whole adjustable range of the TRIAC dimmer. The proposed control chip is fabricated in a TSMC $0.35{\mu}m$ 5V/650V CMOS/LDMOS process, and verified on a 21V/500mA circuit prototype. The test results show that, in the 90V/60Hz~132V/60Hz ac input range, the voltage linear regulation is 2.6%, the power factor is 99.5% and the efficiency is 83%. Moreover, in the dimming mode, the dimming rate is less than 1% when the maximum dimming current is 516mA and the minimum dimming current is only about 5mA.

• International Journal of Precision Engineering and Manufacturing
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• v.9 no.1
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• pp.19-24
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• 2008

We propose a new miniature air-bearing stage with a moving-magnet slotless linear motor. This stage was developed to achieve the precise positioning required for submicron-level machining and miniaturization by introducing air bearings and a linear motor sufficient for mesoscale precision machine tools. The linear motor contained two permanent magnets and was designed to generate a preload force for the vertical air bearings and a thrust force for the stage movement. The characteristics of the air bearings, which used porous pads, were analyzed with numerical methods, and a magnetic circuit model was derived for the linear motor to calculate the required preload and thrust forces. A prototype of a single-axis miniature stage with dimensions of $120\;(W)\;{\times}\;120\;(L)\;{\times}\;50\;(H)\;mm$ was designed and fabricated, and its performance was examined, including its vertical stiffness, load capacity, thrust force, and positioning resolution.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.43-46
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• 2012

In this paper, high efficiency power amplifier is implemented with high gain amplifier. Two-stage amplifier using adaptive bias control circuit improve efficiency at low input power. Fixed bias circuit and adaptive bias circuit both have about 76 % efficiency at maximum power level. However amplifier using an adaptive bias control circuit has 70 % at 6 dBm input power level when the amplifier using fixed bias circuit has 50%. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.11
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• pp.2228-2237
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• 1994

This paper describes the development of a Ku-band ($12.25GHz\sim12.75GHz$) SSPA intended as a replacement for TWTAs used in communication satelite transponder. The power stage of the amplifier consists of tow intrmally matched 8W FET divices combined using the branch-line coupler. To operate this stage, the drive stage has been designed with intermally matched 2W, 4W, 8W FET and two medium power FETs. The entire amplifier is made up by a aluminum chassis housing both the RF circuit and the bias circuitry. A regrlator/sequencing circuitry is used for FET biasing. The amplifier results implemented in this way show $41\pm0.3dB$ small-signal gain, 15W saturation power, a typical two tone $IM_3=-21.5dBc$ with single carrier backed off 5dB from saturation, $2^*/dBmax$ AM/PM conversion, and $3.47\pm0.25nsec$ group delay.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2001.11a
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• pp.123-127
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• 2001

In this paper, prototype high-power-factor single-stage electronic ballast for fluorescent lamps is designed and implemented. A new low cost single stage high power factor electronic ballast for fluorescent lamps is based on integration of two-boost converter and LC type high frequency resonant converter. A ballast is obtained by simple construction, because full bridge rectifier diode is eliminated and simple control circuit is applied. Using two boost converter operating positive and negative half cycle respectively at line frequency (60Hz), operation in discontinuous conduction mode performs high power factor. The experimental results Show the good performance as PF 0.99, $A_{THD}$ 15.4%, and CF 1.65 at Output 63.5W.W.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.3
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• pp.208-216
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• 2018

In this paper, an LLC resonant converter employing two coupled inductors on the secondary side of the converter is proposed. The conventional LLC converter exhibits serious power loss during secondary winding of the transformer because of generation of tremendous output current ripples. To overcome this problem, an LLC resonant converter with a current doubler as a rectifying circuit was recently proposed. However, the current-doubler rectifying circuit requires coupled inductors with a high coupling ratio to retain the designed resonance characteristics. Therefore, an additional hardware filter is required at the output stage to address large output current ripples. Additional design procedures are also necessary because the inductance component of the added filter affects the designed resonant network. To solve this issue, an LLC resonant converter employing two coupled inductors is proposed in this paper. Mathematical analysis shows that the proposed secondary-side current-doubler circuit does not affect the designed resonance characteristics. The operating principles and theoretical analyses are proven through a simulation and experiments with a 54 V/28 A prototype.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.3
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• pp.235-239
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• 1989

A multiplier is proposed for computing multiplication of two arbitrary elements in the finite fields GF($2^m$), and the operation process is described step by step. The modified type of the circuit which is constructed with m-stage feedgack shift register, m-1 flip-flop, m AND gate, and m-input XOR gate is presented by referring to the conventional shift-register multiplier. At the end of mth shift, the shift-register multiplier stores the product of two elements of GF($2^m$); however the proposed circuit in this paper requires m-1 clock times from first input to first output. This circuit is simpler than cellulra-array or systolic multiplier and moreover it is faster than systolic multiplier.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.442-446
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• 2003

This paper proposes a new two-stage two-phase VPP charge pump configured in such a manner that body effect and the threshold voltage loss are eliminated. The newly proposed circuit is fabricated using 0.18um triple-well CMOS process and the measurement result shows that the VPP level tracks 3VDD when VDD is above the threshold voltage.

• Journal of IKEEE
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• v.26 no.3
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• pp.456-461
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• 2022

In this paper, a two-stage single-ended power amplifier (PA) with broadband gain characteristics was presented by utilizing a radio frequency (RF) transformer (TF), which is essential for a differential amplifier. The bandwidth of a PA can be improved by designing TF to have broadband characteristics and then applying it to the inter-stage matching network (IMN) of a PA. For broadband gain characteristics while maintaining the performance and area of the existing PA, an IMN was implemented on an monolithic microwave integrated circuit (MMIC) and a multi-layer printed circuit board (PCB), and the simulation results were compared. As a result of simulating the PA module designed using InGaP/GaAs HBT model, it has been confirmed that the PA employing the proposed design method has an improved fractional bandwidth of 19.8% at a center frequency of 3.3GHz, while the conventional PA showed that of 11.2%.

• ETRI Journal
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• v.36 no.2
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• pp.321-324
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• 2014

This letter describes a two-phase clock oxide thin-film transistor shift register that executes a robust operation over a wide threshold voltage range and clock coupling noises. The proposed circuit employs an additional Q generation block to avoid the clock coupling noise effects. A SMART-SPICE simulation shows that the stable shift register operation is established for the clock coupling noises and the threshold voltage variation from -4 V to 5 V at a line time of $5{\mu}s$. The magnitude of coupling noises on the Q(15) node and Qb(15) node of the 15th stage is respectively -12.6 dB and -26.1 dB at 100 kHz in the proposed circuit, compared to 6.8 dB and 10.9 dB in a conventional one. In addition, the estimated power consumption is 1.74 mW for the proposed 16-stage shift registers at $V_{TH}=-1.56V$, compared to 11.5 mW for the conventional circuits.