• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.717-720
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• 2007

We fabricated the 3.5 inch QCIF AMOLED panel with ultra low temperature polycrystalline silicon TFT on the plastic substrate. To reduce the leakage current, we used the triple layered gate metal structure. To reduce the stress from inorganic dielectric layer, we applied the organic interlayer dielectric and the photoactive insulating layer. By using the interlayer dielectric as a capacitor, the mask steps are reduced up to five.

• Journal of Korean Vacuum Science & Technology
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• v.2 no.1
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• pp.43-48
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• 1998

The effect of mcirostructure on the electrical properties of yttria stabilized zirconia (YSZ) was analyzed by modeling layer arrangements and mixed phase structure. The YSZ thin films were deposited by RF magnetron sputtering using 30mol% YSZ and 8 mol% YSZ targets with yttrium pellets on porous alumina substrates. The structure, composition and electricla properties of the YSZ films were investigated as functions of sputtering conditons and layer arrangements by XRD, TEM, XPS and acimpedance spectroscopy. The results showed that the triple palyered YSZ films had highermicrohardness, lower compressive stress state and higher ionic conductivity by one order than single and double layered YSZ films. However, sputtered YSZ films have low conductivity compared to YSZ pellets or doctor bladed YSZ thin plates. These results were probably due to the influence of insulating alumina substrates, impractical for most stacking geometries and inductance induced by relatively long platinum, lead wire on YSZ conductivity.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2008.11a
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• pp.9-10
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• 2008

Triple layers structure of $SiO_2$/ZnS:Mn/ZnS was synthesized by using ion substitution and chemical precipitation method. Each layer thickness was controlled by adjusting the concentration of manganese (II) acetate ($Mn(CH_3COO)_2$) and tetraethyl orthosilicate (TEOS). The structure and morphology of prepared phosphors were investigated by X-ray diffraction (XRD), scanning electron microscopy (SEM) and electron probe microscopic analyzer (EPMA). Photoluminescence (PL) properties of ZnS with different layer thickness and amount of Mn activator were analyzed by PL spectrometer. PL emission intensity and PL stability were analyzed for evaluating effects of Mn activator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6B
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• pp.1183-1190
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• 1999

This paper presents an efficient hardware architecture to improve the frame memory interface occupying the largest hardware area together with motion estimator in implementing MPEG-2 video encoder as an ASIC chip. In this architecture, the memory size for internal data buffering and hardware area for frame memory interface control logic are reduced through the efficient memory map organization of the external SDRAM having dual bank and memory access timing optimization between the video encoder and external SDRAM. In this design, 0.5 m, CMOS, TLM (Triple Layer Metal) standard cells are used as design libraries and VHDL simulator and logic synthesis tools are used for hardware design add verification. The hardware emulator modeled by C-language is exploited for various test vector generation and functional verification. The architecture of the improved frame memory interface occupies about 58% less hardware area than the existing architecture[2-3], and it results in the total hardware area reduction up to 24.3%. Thus, the (act that the frame memory interface influences on the whole area of the video encoder severely is presented as a result.

• Journal of Sensor Science and Technology
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• v.29 no.5
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• pp.354-359
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• 2020

The high vacuum hermetic sealing technique ensures excellent performance of MEMS resonators. For the high vacuum hermetic sealing, the customization of anodic bonding equipment was conducted for the glass/Si/glass triple-stack anodic bonding process. Figure 1 presents the schematic of the MEMS resonator with triple-stack high-vacuum anodic bonding. The anodic bonding process for vacuum sealing was performed with the chamber pressure lower than 5 × 10^-6 mbar, the piston pressure of 5 kN, and the applied voltage was 1 kV. The process temperature during anodic bonding was 400 ℃. To maintain the vacuum condition of the glass cavity, a getter material, such as a titanium thin film, was deposited. The getter materials was active at the 400 ℃ during the anodic bonding process. To read out the electrical signals from the Si resonator, a vertical feed-through was applied by using through glass via (TGV) which is formed by sandblasting technique of cap glass wafer. The aluminum electrodes was conformally deposited on the via-hole structure of cap glass. The TGV process provides reliable electrical interconnection between Si resonator and aluminum electrodes on the cap glass without leakage or electrical disconnection through the TGV. The fabricated MEMS resonator with proposed vacuum packaging using three-layer anodic bonding process has resonance frequency and quality factor of about 16 kHz and more than 40,000, respectively.

• Food Science of Animal Resources
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• v.27 no.4
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• pp.543-547
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• 2007

Bovine mastitis is costly infectious disease of dairy cattle, being responsible for significant economic losses all over the world. Also, mastitis has troubled about resistance to antibiotics. The purpose of this study was to screen a novel antimicrobial strain from various sources (raw milk and feeds (from farm of Paju, Dangjin, and Hwasung), commercial milk, Korean traditional fermented foods, and chicken feces). The isolate was screened using triple agar layer method and deferred method was used for confirmation of antimicrobial effect. Seventy six of isolates were screened using triple agar layer method. In these strain, 42 isolates were shown a broad spectrum of autimicrobial activity against mastitis pathogens. Especially, fourteen isolates were shown over 20 mm inhibition zone against S. aureous ATCC 25923. These results suggest that these novel antimicrobial strains could be used for the alternative of antibiotics.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.4
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• pp.77-82
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• 2015

To increase the performance of solid oxide fuel cell operating at intermediate temperature ($600^{\circ}C{\sim}800^{\circ}C$), $Sm_{0.2}Ce_{0.8}O_2$ (SDC) thin layer was applied to the $La_{0.8}Sr_{0.2}Mn_{0.8}Cu_{0.2}O_3$ (LSMCu) cathode by sol-gel coating method. The SDC was employed as a diffusion barrier layer on the yttria-stabilized zirconia(YSZ) to prevent the interlayer by-product formation of $SrZrO_3$ or $La_2Zr_2O_7$. The by-products were hardly formed at the electrolyte-cathode interlayer resulting to reduce the cathode polarization resistance. Moreover, SDC thin film was coated on the cathode pore wall surface to extend the triple phase boundary (TPB) area.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.264-267
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• 2015

AlCrNO cermet films were prepared on aluminum substrates using a DC-reactive magnetron sputtering method and a water-cooled Al:Cr target. The Al₂O₃/AlCrNO (LMVF)/AlCrNO (MMVF)/AlCrNO (HMVF)/Al/substrate of the 5 multi-layers was prepared according to the Ar and (N₂ + O₂) gas-mixture rates. The Al₂O₃ of the top layer is the anti-reflection layer of triple AlCrNO (LMVF)/AlCrNO (MMVF)/AlCrNO (HMVF) layers, and an Al metal forms the infrared reflection layer. In this study, the crystallinity and surface properties of the AlCrNO thin films were estimated using X-ray diffraction (XRD) and field-emission scanning electron microscopy (FESEM), while the composition of the thin films was systematically investigated using Auger electron spectroscopy (AES). The optical properties of the wavelength spectrum were recorded using UH4150 spectrophotometry (UV-Vis-NIR) at a range of 0.3 μm to 2.5 μm.

• Journal of the Korean Ceramic Society
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• v.44 no.12
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• pp.727-732
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• 2007

In order to fabricate a highly performing cathode for low-temperature type solid oxide fuel cells working at below $700^{\circ}C$, electrode microstructure control and electrode polarization measurement were performed with an electronic conductor, $La_{0.8}Sr_{0.2}MnO_3$ (LSM) and a mixed conductor, $La_{0.6}Sr_{0.4}Co_{0.2}Fe_{0.8}O_3$(LSCF). For both cathode materials, when $Sm_{0.2}Ce_{0.8}O_2$ (SDC) buffer layer was formed between the cathode and yttria-stabilized zirconia (YSZ) electrolyte, interfacial reaction products were effectively prevented at the high temperature of cathode sintering and the electrode polarization was also reduced. Moreover, cathode polarization was greatly reduced by applying the SDC sol-gel coating on the cathode pore surface, which can increase triple phase boundary from the electrolyte interface to the electrode surface. For the LSCF cathode with the SDC buffer layer and modified by the SDC sol-gel coating on the cathode pore surface, the cathode resistance was as low as 0.11 ${\Omega}{\cdot}cm^2$ measured at $700^{\circ}C$ in air atmosphere.