• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.865-873
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• 2017

Converter transformer is the key equipment of high voltage direct current transmission system. The solid suspending particles originating from the process of installation and operation of converter transformer have significant influence on the insulation performance of transformer oil, especially in presence of DC component in applied voltage. Under high electric field, the particles easily lead to partial discharge and breakdown of insulating oil. This paper investigated copper particle effect on the breakdown voltage of transformer oil at combined AC and DC voltage. A simulation model with single copper particle was established to interpret the particle effect on the breakdown strength of insulating oil. The experimental and simulation results showed that the particles distort the electric field. The breakdown voltage of insulating oil contaminated with copper particle decreases with the increase of particle number, and the breakdown voltage and the logarithm of particle number approximately satisfy the linear relationship. With the increase of the DC component in applied voltage, the breakdown voltage of contaminated insulating oil decreases. The simulation results show that the particle collides with the electrode more frequently with more DC component contained in the applied voltage, which will trigger more discharge and decrease the breakdown voltage of insulating oil.

• 전기전자학회논문지
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• 제2권1호
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• pp.101-107
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• 1998

인(Phosphorus)을 1MeV로 이온 주입한 후 RTA를 실시하여 미세결함의 특성을 조사하고, 면저항, SRP, SIMS, XTEM 분석과 CMOS 구조에서 래치업 특성을 모의 실험하였다. 도즈량이 증가할수록 면저항은 낮아지고, Rp값은 도즈량이 $1{\times}10^{13}/cm^2,\;5{\times}10^{13}/cm^2,\;1{\times}10^{14}/cm^2$일때 각각 $1.15{\mu}m,\;1.15{\mu},\;1.10{\mu}m$로 나타났다. SIMS 측정결과는 열처리 시간이 길수록 농도의 최대치가 표면으로부터 깊어지고, 농도 또한 낮아짐을 확인하였다. XTEM 분석 결과는 열처리 전에는 결함측정이 불가능했으나, 측정되지 많은 미세결함이 열처리 후 이차결함으로 성장한 것으로 조사되었다. 모의 실험은 buried layer와 connecting layer 구조를 사용하였으며, buried layer보다 connecting layer가 래치업 특성이 우수함을 확인하였다. Connecting layer의 도즈량이 $1{\times}10^{14}/cm^2$이고 이온주입 에너지가 500KeV일 때 trigger current는 $0.6mA/{\mu}m$이상이었고, trigger voltage는 약 6V로 나타났다. Connecting layer의 이온주입 에너지가 낮을수록 래치업 저감효과가 더욱 우수함을 알 수 있었다.

• 전기전자학회논문지
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• 제22권1호
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• pp.80-86
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• 2018

본 논문에서는 기존 ESD 보호회로인 SCR, LVTSCR 보다 향상된 전기적 특성을 갖는 새로운 PNP 바이폴라 삽입형 ESD 보호회로를 제안한다. 제안된 회로는 기존 SCR에 대비하여 약 9V낮은 8.59V의 트리거 전압을 가지고, 기생 PNP가 하나 더 동작하면서 높은 감내특성을 갖는다. 또한 제안된 ESD 보호회로의 실제 설계 적용을 위해 변수 L을 늘리면서 기생 PNP의 베이스 길이를 늘려 홀딩전압을 증가시켰다. 제안된 소자의 전기적 특성 검증을 위해 Synopsys사의 T-CAD 시뮬레이터를 사용하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.2210-2211
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• 2008

In this paper, we investigated the quenching characteristics of a superconducting fault current limiter (SFCL) with connection of $2{\times}3$ matrixes. This SFCL consists of the trigger part to apply magnetic field and the current-limiting part to limit the fault current. When the fault occurs, the magnetic field generated in the reactor connected in parallel was applied to the two superconducting units of the current-limiting part to reduce of inhomogeneous critical current behavior between the superconducting units. The quenching behavior of a superconducting unit in the trigger part was affected by the increase of turn numbers. This is because of the difference of current distribution between the inductance of the reactors and the resistance generated in the superconducting units in trigger part. We confirmed that the voltage differences between two superconducting units of the current-limiting part were decreased. This is because of the improvement of inhomogeneous critical current behavior between the superconducting units according to the increase of external magnetic field.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.731-734
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.805-808
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.339-344
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• 2014

This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

• 전기전자학회논문지
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• 제13권1호
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• pp.87-93
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• 2009

본 논문에서는 높은 홀딩 전압을 갖는 사이리스터(SCR; Silicon Controlled Rectifier)구조에 기반 한 새로운 구조의 ESD(Electro-Static Discharge) 보호 소자를 제안하였다. 홀딩전압은 애노드단을 감싸고 있는 n-well에 p+ 캐소드를 확장시키고, 캐소드단을 n-well로 추가함으로써 홀딩전압을 증가시킬 수 있다. 제안된 소자는 높은 홀딩전압 특성으로 높은 래치업 면역성을 갖는다. 본 연구에서 제안된 소자의 전기적 특성, 온도특성, ESD 감내특성을 확인하기 위하여 TCAD 시뮬레이션 툴을 이용하여 시뮬레이션을 수행하였다. 시뮬레이션 결과 제안된 소자는 10.5V의 트리거 전압과 3.6V의 홀딩전압을 갖는다. 그리고 추가적인 n-well과 확장된 p+의 사이즈 변화로 4V이상의 홀딩전압을 갖는 것을 확인하였다.

• Journal of electromagnetic engineering and science
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• 제18권1호
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• pp.20-28
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• 2018

The time synchronization of each sub-unit of a pulsed generator is important to generate an output high-power radio frequency (RF) signal. To obtain the time synchronization between an input RF signal fed by an external source and an electron beam produced by an electric pulse generator, the influence of different charging voltages on a delay and a rise time of the output pulse waveform in the electric pulse generator should be carefully considered. This paper aims to study the timing characteristics of the delay and the rise time as a function of different charging voltages with a peak value of less than -35 kV in the high-voltage pulse generator, including a trigger generator (TG) and a pulse-forming line (PFL). The simulation has been carried out to estimate characteristics in the time domain, in addition to their output high-voltage amplitude. Experimental results compared with those obtained by simulation indicate that the delay of the output pulses of the TG and PFL, which are made by controlling the external triggering signal with respect to different charging voltages, is getting longer as the charging voltage is increasing, and their rise times are inversely proportional to the amplitude of the charging voltage.

• 한국항공우주학회지
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• 제33권2호
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• pp.113-118
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• 2005

본 논문은 한쪽 또는 양쪽의 측정 점들이 종래의 차동증폭기에서 허용되는 전압 범위를 초과할 때 차동전압 측정을 위한 인공위성 배터리 셀 전압 감시 시스템을 제시하였다. 본 시스템은 다수개의 직렬로 연결된 셀들로 구성된 재충전 가능한 인공위성 배터리에서 몇몇의 셀 전압들이 높은 공통모드 전압에서 측정될 때 각 셀 전압 감시를 위해 특히 유용하다.