• Title/Summary/Keyword: TiN Layer

Search Result 536, Processing Time 0.028 seconds

Effect of plasma treatment to surface of the titanium oxide deposited by plasma enhanced atomic layer deposition

  • Gwon, Tae-Seok;Kang, Byeong-Woo;Kim, Gyeong-Taek;Mun, Dae-Yong;Kim, Ung-Seon;Mun, Yeon-Geon;Park, Jong-Wan
    • Proceedings of the Korean Institute of Surface Engineering Conference
    • /
    • 2009.10a
    • /
    • pp.183-184
    • /
    • 2009
  • 자체 발광형 디스플레이는 잠재적인 장점에도 불구하고 수분에 대한 열화와 같은 기술적인 문제로 상업화하기 어려움이 있어 수분 투습 방지막이 필요하다. 이에 본 연구에서는 작은 결점 크기와 낮은 결점 밀도를 가지는 $TiO_2$ 보호막을 PEALD법으로 증착 하여 $N_2$$NH_3$ plasma 처리에 따른 표면 효과를 알아보았다.

  • PDF

Microtube Light-Emitting Diode Arrays with Metal Cores

  • Tchoe, Youngbin;Lee, Chul-Ho;Park, Junbeom;Baek, Hyeonjun;Chung, Kunook;Jo, Janghyun;Kim, Miyoung;Yi, Gyu-Chul
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2016.02a
    • /
    • pp.287.1-287.1
    • /
    • 2016
  • Three-dimensional (3-D) semiconductor nanoarchitectures, including nano- and micro- rods, pyramids, and disks, are emerging as one of the most promising elements for future optoelectronic devices. Since these 3-D semiconductor nanoarchitectures have many interesting unconventional properties, including the use of large light-emitting surface area and semipolar/nonpolar nano- or micro-facets, numerous studies reported on novel device applications of these 3-D nanoarchitectures. In particular, 3-D nanoarchitecture devices can have noticeably different current spreading characteristics compared with conventional thin film devices, due to their elaborate 3-D geometry. Utilizing this feature in a highly controlled manner, color-tunable light-emitting diodes (LEDs) were demonstrated by controlling the spatial distribution of current density over the multifaceted GaN LEDs. Meanwhile, for the fabrication of high brightness, single color emitting LEDs or laser diodes, uniform and high density of electrical current must be injected into the entire active layers of the nanoarchitecture devices. Here, we report on a new device structure to inject uniform and high density of electrical current through the 3-D semiconductor nanoarchitecture LEDs using metal core inside microtube LEDs. In this work, we report the fabrications and characteristics of metal-cored coaxial $GaN/In_xGa_{1-x}N$ microtube LEDs. For the fabrication of metal-cored microtube LEDs, $GaN/In_xGa_{1-x}N/ZnO$ coaxial microtube LED arrays grown on an n-GaN/c-Al2O3 substrate were lifted-off from the substrate by wet chemical etching of sacrificial ZnO microtubes and $SiO_2$ layer. The chemically lifted-off layer of LEDs were then stamped upside down on another supporting substrates. Subsequently, Ti/Au and indium tin oxide were deposited on the inner shells of microtubes, forming n-type electrodes of the metal-cored LEDs. The device characteristics were investigated measuring electroluminescence and current-voltage characteristic curves and analyzed by computational modeling of current spreading characteristics.

  • PDF

Deposition of Spacer-Si3N4 Thin Film for WSi2 Word-Line and Bit-Line (WSi2 word-line 및 bit-line용 spacer-Si3N4 박막의 증착)

  • Ahn S.;Kim D.W.;Kim J.H;Ahn S.J.;Kim Y.J.;Kim H.S.
    • Korean Journal of Materials Research
    • /
    • v.14 no.6
    • /
    • pp.402-406
    • /
    • 2004
  • $WSi_2$, $TiSi_2$, $CoSi_2$, and $TaSi_2$ are general silicides used today in semiconductor devices. $WSi_2$ thin films have been proposed, studied and used recently in CMOS technology extensively to reduce sheet resistance of polysilicon and $n^{+}$ region. However, there are several serious problems encountered because $WSi_2$ is oxidized and forms a native oxide layer at the interface between $WSi_2$ and $Si_3$$N_4$. In this study, we have introduced 20 $slm-N_2$ gas from top to bottom of the furnace in order to control native oxide films between $WSi_2$ and $Si_3$$N_4$ film. In resulting SEM photographs, we have observed that the native oxide films at the surface of $WSi_2$ film are removed using the long injector system.

Fabrication of the 7$\times$7 mm Planar Inductor for 1W DC-DC Converter (1W DC-DC 컨버터를 위한 7$\times$7 mm 평면 인덕터의 제조)

  • Bae, Seok;Ryu, Sung-Ryong;Kim, Choong-Sik;Nam, Seoung-Eui;Kim, Hyoung-June;Min, Bok-Ki;Song, Jae-Sung
    • Journal of the Korean Magnetics Society
    • /
    • v.11 no.5
    • /
    • pp.222-225
    • /
    • 2001
  • The planar type inductors have a good potential for the application of miniaturized low power DC-DC converters. For those high quality application, the reduction of coil loss and also magnetic films which have good high frequency properties are required. Fabricated inductor was consisted of FeTaN/Ti magnetic film and electroplated Cu coil thickness of 100$\mu\textrm{m}$ and $SiO_2$ as a insulating layer. The inductor was designed double rectangular spiral shape for magnetic field highly confining within the device. The measured value of inductance and resistance were 980 nH and 1.7 $\Omega$ at 1 MHz as operating frequency of device. The Q factor is 3.55 at 1 MHz.

  • PDF

Properties and SPICE modeling for a Schottky diode fabricated on the cracked GaN epitaxial layers on (111) silicon

  • Lee, Heon-Bok;Baek, Kyong-Hum;Lee, Myung-Bok;Lee, Jung-Hee;Hahm, Sung-Ho
    • Journal of Sensor Science and Technology
    • /
    • v.14 no.2
    • /
    • pp.96-100
    • /
    • 2005
  • The planar Schottky diodes were fabricated and modeled to probe the device applicability of the cracked GaN epitaxial layer on a (111) silicon substrate. On the unintentionally n-doped GaN grown on silicon, we deposited Ti/Al/Ni/Au as the ohmic metal and Pt as the Schottky metal. The ohmic contact achieved a minimum contact resistivity of $5.51{\times}10.5{\Omega}{\cdot}cm^{2}$ after annealing in an $N_{2}$ ambient at $700^{\circ}C$ for 30 sec. The fabricated Schottky diode exhibited the barrier height of 0.7 eV and the ideality factor was 2.4, which are significantly lower than those parameters of crack free one. But in photoresponse measurement, the diode showed the peak responsivity of 0.097 A/W at 300 nm, the cutoff at 360 nm, and UV/visible rejection ratio of about $10^{2}$. The SPICE(Simulation Program with Integrated Circuit Emphasis) simulation with a proposed model, which was composed with one Pt/GaN diode and three parasitic diodes, showed good agreement with the experiment.

Electrode Dependence of Asymmetric Behavior of (La,Sr)CoO₃/Pb(Zr,Ti)O₃/(La,Sr)CoO₃ Thin Film Capacitors ((La,Sr)CoO₃/Pb(Zr,Ti)O₃/(La,Sr)CoO₃박막 캐패시터의 비대칭성의 전극 의존성)

  • 최치홍;이재찬;박배호;노태원
    • Journal of the Korean Ceramic Society
    • /
    • v.35 no.7
    • /
    • pp.647-647
    • /
    • 1998
  • (La,Sr)CoO3/Pb(Zr,Ti)O3/(La,Sr)CoO3 (LSCO) heterostructures have been grown on LaAlO3 substrates by pulsed laser deposition (PLD) to investigate asymmetric polarization of Pb(Zr,Ti)O3 (PZT) thin flims with different electrode configuration. P-V hysteresis loop of LSCO/PZT/LSCO was symmetric. However, LaCoO3 (LCO_/PZT/LSCO showed a largely asymmetric P-V hystersis loop and large relaxation of the remanent polarization at the negatively poled state, which means that the negatively poled state was unstable. On the other hand, LSCO/PZT/LCO exhibited large relaxation of the positively poled state. The asymmetric behavior of the polarized states implies the presence of an interal electric firld inside the PZT layer. It is suggested that internal electric field is caused by built-in voltages at LCO/PZT and LSCO/PZT interfaces. The built-in voltages at LCO/PZT and CSCO/PZT interfaces were 0.6 V and -0.12 V, respectively.

Effect of Overlayer Thickness of Hole Transport Material on Photovoltaic Performance in Solid-Sate Dye-Sensitized Solar Cell

  • Kim, Hui-Seon;Lee, Chang-Ryul;Jang, In-Hyuk;Kang, Wee-Kyung;Park, Nam-Gyu
    • Bulletin of the Korean Chemical Society
    • /
    • v.33 no.2
    • /
    • pp.670-674
    • /
    • 2012
  • The photovoltaic performance of solid-state dye-sensitized solar cells employing hole transport material (HTM), 2,2',7,7'-tetrakis-(N,N-di-p-methoxyphenyl-amine)-9,9'-spirobifluorene (spiro-MeOTAD), has been investigated in terms of HTM overlayer thickness. Two important parameters, soak time and spin-coating rate, are varied to control the HTM thickness. Decrease in the period of loading the spiro-MeOTAD solution on $TiO_2$ layer (soak time) leads to decrease in the HTM overlayer thickness, whereas decrease in spin-coating rate increases the HTM overlayer thickness. Photocurrent density and fill factor increase with decreasing the overlayer thickness, whereas open-circuit voltage remains almost unchanged. The improved photocurrent density is mainly ascribed to the enhanced charge transport rate, associated with the improved charge collection efficiency. Among the studied HTM overlayer thicknesses, ca. 230 nm-thick HTM overlayer demonstrates best efficiency of 4.5% at AM 1.5G one sun light intensity.

Manufacture and characteristic evaluation of Amorphous Indium-Gallium-Zinc-Oxide (IGZO) Thin Film Transistors

  • Seong, Sang-Yun;Han, Eon-Bin;Kim, Se-Yun;Jo, Gwang-Min;Kim, Jeong-Ju;Lee, Jun-Hyeong;Heo, Yeong-U
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2010.08a
    • /
    • pp.166-166
    • /
    • 2010
  • Recently, TFTs based on amorphous oxide semiconductors (AOSs) such as ZnO, InZnO, ZnSnO, GaZnO, TiOx, InGaZnO(IGZO), SnGaZnO, etc. have been attracting a grate deal of attention as potential alternatives to existing TFT technology to meet emerging technological demands where Si-based or organic electronics cannot provide a solution. Since, in 2003, Masuda et al. and Nomura et al. have reported on transparent TFTs using ZnO and IGZO as active layers, respectively, much efforts have been devoted to develop oxide TFTs using aforementioned amorphous oxide semiconductors as their active layers. In this thesis, I report on the performance of thin-film transistors using amorphous indium gallium zinc oxides for an active channel layer at room temperature. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium gallium zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium gallium zinc oxide was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 1.5V and an on/off ration of > $10^9$ operated as an n-type enhancement mode with saturation mobility with $9.06\;cm^2/V{\cdot}s$. The devices show optical transmittance above 80% in the visible range. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium gallium zinc oxides for an active channel layer were reported. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

  • PDF

A study on Electrical and Diffusion Barrier Properties of MgO Formed on Surface as well as at the Interface Between Cu(Mg) Alloy and $SiO_2$ (Cu(Mg) alloy의 표면과 계면에서 형성된 MgO의 확산방지능력 및 표면에 형성된 MgO의 전기적 특성 연구)

  • Jo, Heung-Ryeol;Jo, Beom-Seok;Lee, Jae-Gap
    • Korean Journal of Materials Research
    • /
    • v.10 no.2
    • /
    • pp.160-165
    • /
    • 2000
  • We have investigated the electrical and diffusion barrier properties of MgO produced on the surface of Cu (Mg) alloy. Also the diffusion barrier property of the interfacial MgO between Cu alloy and $SiO_2$ has been examined. The results show that the $150\;{\AA}$-MgO layer on the surface remains stable up to $700^{\circ}C$, preventing the interdiffusion of C Cu and Si in Si/MgO/Cu(Mg) structure. It also has the breakdown voltage of 4.5V and leakage current density of $10^{-7}A/\textrm{cm}^2/$. In addition, the combined structure of $Si_3N4(100{\AA})/MgO(100{\AA})$ increases the breakdown voltage up to lOV and reduces the leakage current density to $8{\tiems}10^{-7}A/\textrm{cm}^2$. Furthermore, the interfacial MgO formed by the chemical reac­t tion of Mg and $SiO_2$ reduces the diffusion of copper into $SiO_2$ substrate. Consequently, Cu(Mg) alloy can be applied as a g gate electrode in TFT /LCDs, reducing the process steps.

  • PDF

Improvement in $AI_2O_3$ dielectric behavior by using ozone as an oxidant for the atomic layer deposition technique (ALD법으로 제조된 $AI_2O_3$막의 유전적 특성)

  • 김재범;권덕렬;오기영;이종무
    • Journal of the Korean Vacuum Society
    • /
    • v.11 no.3
    • /
    • pp.183-188
    • /
    • 2002
  • In the present study AI$(CH_3)_3)$films were deposited by the ALD technique using trimethylaluminum(TMA) and ozone to improve the quality of the AI$(CH_3)_3)$ films, since the $OH^-$ radicals existing in the AI$(CH_3)_3)$ films deposited using TMA and $H_2O$ degrade the physical and the dielectric properties of the AI$(CH_3)_3)$ film. The XPS analysis results indicate that the $OH^-$ radical concentration in the AI$(CH_3)_3)$film deposited using $O_3$is lower than that using $H_2O$. The etch rate of the AI$(CH_3)_3)$film deposited using $O_3$is also lower than that using $H_2O$, suggesting that the chemical inertness of the former is better than the latter. The MIS capacitor fabricated with the TiN conductor and the $Al_2$O$_3$dielectrics formed using $O_3$offers lower leakage current, better insulating property and smaller flat band voltage shift $({\Delta}V_{FB})$.