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Properties and SPICE modeling for a Schottky diode fabricated on the cracked GaN epitaxial layers on (111) silicon

  • Lee, Heon-Bok (School of Electrical Engineering, Kyungpook National University) ;
  • Baek, Kyong-Hum (School of Electrical Engineering, Kyungpook National University) ;
  • Lee, Myung-Bok (School of Electrical Engineering, Kyungpook National University) ;
  • Lee, Jung-Hee (School of Electrical Engineering, Kyungpook National University) ;
  • Hahm, Sung-Ho (School of Electrical Engineering, Kyungpook National University)
  • Published : 2005.03.30

Abstract

The planar Schottky diodes were fabricated and modeled to probe the device applicability of the cracked GaN epitaxial layer on a (111) silicon substrate. On the unintentionally n-doped GaN grown on silicon, we deposited Ti/Al/Ni/Au as the ohmic metal and Pt as the Schottky metal. The ohmic contact achieved a minimum contact resistivity of $5.51{\times}10.5{\Omega}{\cdot}cm^{2}$ after annealing in an $N_{2}$ ambient at $700^{\circ}C$ for 30 sec. The fabricated Schottky diode exhibited the barrier height of 0.7 eV and the ideality factor was 2.4, which are significantly lower than those parameters of crack free one. But in photoresponse measurement, the diode showed the peak responsivity of 0.097 A/W at 300 nm, the cutoff at 360 nm, and UV/visible rejection ratio of about $10^{2}$. The SPICE(Simulation Program with Integrated Circuit Emphasis) simulation with a proposed model, which was composed with one Pt/GaN diode and three parasitic diodes, showed good agreement with the experiment.

Keywords

References

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