• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.70-75
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• 2014

Recently, the demand for high-integrated, low-powered, and high-powered SoC design has been increasing due to the multi-functionality and the miniaturization of digital devices and the high capacity of service informations. With the rapid evolution of the system, the required hardware performances have become diversified, the FPGA system has been increasingly adopted for the rapid verification, and SoC system using the FPGA and the ARM core for control has been growingly chosen. While the AXI bus is used in these kinds of systems in various ways, it is traditionally designed with AXI slave structure. In slave structure, there are problems with the CPU resources because CPU is continually involved in the data transfer and can't be used in other jobs, and with the decreased transmission efficiency because the time not used of AXI bus beomes longer. In this paper, an efficient AXI master interface is proposed to solve this problem. The simulation results show that the proposed system achieves reductions in the consumption clock by an average of 51.99% and in the slice by 31% and that the maximum operating frequency is increased to 107.84MHz by about 140%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.9
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• pp.936-943
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• 2013

This work presents the design and measured results of the single channel automotive radar system for 76.5~77 GHz long range FMCW radar applications. The transmitter uses a commercial GaAs monolithic microwave integrated circuit(MMIC) and the receiver uses the down converter designed using 65 nm CMOS process. The output power of the transmitter is 10 dBm. The down converter chip can operate at low LO power as -8 dBm which is easily supplied from the transmitter output using a coupled line coupler. All MMICs are mounted on an aluminum jig which embeds the WR-10 waveguide. A microstrip to waveguide transition is designed to feed the embedded waveguide and finally high gain horn antennas. The overall size of the fabricated radar system is $80mm{\times}61mm{\times}21mm$. The radar system achieved an output power of 10 dBm, phase noise of -94 dBc/Hz at 1 MHz offset and a conversion gain of 12 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.1C
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• pp.86-93
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• 2008

The Galileo system, a global navigation satellite system(GNSS) developed by E.U., uses the direct sequence/spread spectrum(DS/SS) modulation. A DS/SS-based system performs a fine synchronization between the received and locally generated spreading signals, via attacking process. In the absence of multipath signals, using the symmetric characteristic of the correlation function, the delay lock loop with the early minus late discriminator(EL-DLL) offers the best performance in tracking. However, in the presence of multipath signals, the symmetry of the correlation function could be lost, causing a tracking bias. In this paper, we observe that the correlation values in the advanced offset range remain almost unchanged, due to the multipath signals being received later than a line-of-sight signal. Based on this observation, we propose a novel tracking scheme for a Galileo BOC(1,1) system.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.5
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• pp.509-517
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• 2001

Full-search algorithm requires large amount of computation which causes time delay or very complex hardware architecture for real time implementation. In this paper, we propose a fast motion estimator based on bit-plane matching, which reduce the computational complexity and the hardware cost. In the proposed motion estimator, the conventional motion estimation algorithms are applied to the binary images directly extracted from the video sequence. Furthermore, in the proposed VLSI motion estimator, we employ a Pair of processing cores that calculate the motion vector continuously By controlling the data flow in a systolic fashion using the internal shift registers in the processing cores, we avoid using SRAM (local memory) so that we remove the time overhead for accessing the local memory and adopt lower-cost fabrication technology. We modeled and tested the proposed motion estimator in VHDL, and then synthesized the whole system which has been integrated in a 0.6-$\mu$m triple-metal CMOS chip of size 8.15 X 10.84$\textrm{mm}^2$.

• Journal of Korean Society for Quality Management
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• v.31 no.4
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• pp.81-94
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• 2003

Six sigma is a management innovation strategy which improves all managerial processes in an integrated manner, Six sigma can be applied to every aspect of managerial functions such as marketing, engineering, purchasing, accounting, and so on. Six sigma is trying to solve quality problems from the customer's viewpoint in the scientific manner, thus maximizing profits through the elimination of quality costs. This paper is presented to verify empirically the successful factors of implementing six sigma through the survey of black­belts of Korean firms. The blue­chip companies in Korea and across the world have already adopted Six Sigma, and it is becoming an integral part of the corporate culture of these companies. In conclusion, the most important factors to the success of six sigma are found to be the leadership of top management, and the compensation/ incentive system. The analysis also shows that the important factors are different in terms of both the process type and implementing stage.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.2
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• pp.10-18
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• 2011

In order to develop highly-integrated RGBY(Red, Green, Blue, Yellow) LED light, a high thermal radiation ceramic package was manufactured, and the encapsulation process was applied with a vacuum printing encapsulation system(VPES). After the completion of vacuum printing, the shape of the encapsulation layer could be controlled by heat treatment during the curing process, and the optical power became highly increased as the encapsulation layer approached a dome shape. The optical characteristics involved in a Correlated Color Temperature(CCT), a Color Rendering Index (CRI), and the efficiency of RGBY LED light were able to be identified by the experimental designing method. Regarding the characteristics of the white light of RGBY LED light, which were measured on the basis of the aforementioned optical characteristics, CRI posted 88, CCT recorded 5,720[$^{\circ}K$], and efficiency exhibited 52[lm/W]. The chip temperature of RGBY LEDs was below 55[$^{\circ}C$] when the consumption power of LED chips was 0.1[W] for the red, 0.3[W] for the green, 0.08[W] for the blue, and 0.24[W] for the yellow. Also, the thermal resistance of the highly-integrated RGBY LED light measured by T3Ster was 2.3[K/W].

• Proceedings of KOSOMES biannual meeting
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• 2005.11a
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• pp.197-202
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• 2005

Generally, a semiconductor chip measured with a few micro units is captured by line scan camera for higher inspection accuracy. However, the faulty inspection requires an exact boundary detection algorithm because it is very sensitive to scan speed and lighting conditions. In this paper we propose boundary detection using subpixel edge detection method in order to increase the accuracy of bump faulty detection on chips. The bump edge is detected by first derivative to four directions from bump center point and the exact edge positions are searched by the subpixel method. Also, the exact bump boundary to calculate the actual bump size is computed by LSM(Least Squares Method) to minimize errors since the bump size is varied such as bump protrusion, bump bridge, and bump discoloration. Experimental results exhibit that the proposed algorithm shows large improvement comparable to the other conventional boundary detection algorithms.

• Journal of Welding and Joining
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• v.28 no.6
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• pp.35-39
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• 2010

Generally, ceramic material is very difficult to machine due to high strength and hardness. However, ceramic material can be machined at high temperature by plastic flow as metallic material due to the deterioration of the grain boundary glassy phase. Recently, a new method was developed to execute cutting process with CBN cutting tool by local heating of surface with laser. There are various parameters in LAM because it is a complex process with laser treatment and machining. During laser assisted machining, high power results in reducing of cutting force and increasing tool life, but excessive power brings oxidation of the surface. The effect of laser power, feed rate, cutting depth and etc. were investigated on the life of cutting tool. Chips were observed to find out suitable machining conditions. Chips of SSN had more flow-types than HIPSN. It means SSN is easier to machining. The life of cutting tool was increased with increasing laser power and decreasing feed rate and cutting depth.

• Korean Journal of Optics and Photonics
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• v.14 no.5
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• pp.504-508
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• 2003

We present a new point-diffraction interferometer, which has been devised for the three-dimensional profile measurement of light scattering rough surfaces. The interferometer system has multiple sources of two-point-diffraction and a CCD camera composed of an array of two-dimensional photodetectors. Each diffraction source is an independent two-point-diffraction interferometer made of a pair of single-mode optical fibers, which are housed in a ceramic ferrule to emit two spherical wave fronts by means of diffraction at their free ends. The two spherical wave fronts then interfere with each other and subsequently generate a unique fringe pattern on the test surface. A He-Ne source provides coherent light to the two fibers through a 2${\times}$l optical coupler, and one of the fibers is elongated by use of a piezoelectric tube to produce phase shifting. The xyz coordinates of the target surface are determined by fitting the measured phase data into a global model of multilateration. Measurement has been performed for the warpage inspection of chip scale packages (CSPs) that are tape-mounted on ball grid arrays (BGAs) and backside profile of a silicon wafer in the middle of integrated-circuit fabrication process. When a diagonal profile is measured across the wafer, the maximum discrepancy turns out to be 5.6 ${\mu}{\textrm}{m}$ with a standard deviation of 1.5 ${\mu}{\textrm}{m}$.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.1
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• pp.7-18
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• 2008

This paper reviews the current development of an ultra-slim SiP for Radio Frequency (RF) application, in which three flip chips, additional passive components and Surface Acoustic Wave (SAW) filters are integrated side-by-side. A systematic investigation is carried out for the design optimization, process and reliability improvement of the package, which comprises several aspects: a design study based on the 3D thermo-mechanical finite element analysis of the packaging, the determination of stress, warpage distribution, critical failure zones, and the figuration of the effects of material properties, process conditions on the reliability of package. The optimized material sets for manufacturing process were determined which can reduce the number of testing samples from 75 to 2. In addition the molded underfilling (MUF) process is proposed which not only saves one manufacturing process, but also improves the thermo-mechanical performance of the package compared with conventional epoxy underfilling process. In the end, JEDEC's moisture sensitivity test, thermal cycle test and pressure cooker tests have also been carried out for reliability evaluation. The test results show that the optimized ultra-slim SiP has a good reliability performance.