• Proceedings of the Korea Society of Environmental Toocicology Conference
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• 2003.05a
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• pp.187-187
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• 2003

Methylmercury (MeHg), one of the heavy metal compounds, can cause severe damage to the central nervous system in humans. Many reports have shown that MeHg is poisonous to human body through contaminated foods and has released into the environment. Despite many studies on the pathogenesis of MeHg-induced central neuropathy, no useful mechanism of toxicity has been established so far. In this study, two methods, cDNA Microarray and SSH, were performed to assess the expression profile against MeHg and to identify differentially expressed genes by MeHg in neuroblastoma cell line. TwinChip Human-8K (Digital Genomics) was used with total RNA from SH-SY5Y (human neuroblastoma cell line) treated with solvent (DMSO) and 6.25 uM (IC50) MeHg. And we performed forward and reverse SSH method on mRNA derived from SH-SY5Y treated with DMSO and MeHg (6.25 uM). Differentially expressed cDNA clones were sequenced and were screened by dot blot and ribonuclease protection assay to confirm that individual clones indeed represent differentially expressed genes. These sequences were identified by BLAST homology search to known genes or expressed sequence tags (ESTs). Analysis of these sequences may provide an insight into the biological effects of MeHg in the pathogenesis of neurodegenerative disease and a possibility to develop more efficient and exact monitoring system of heavy metals as environmental pollutants.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.24-30
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• 2009

In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1645-1646
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• 2006

Micro ElectroMechanical Systems (MEMS) 기술을 이용한 초미세 유체 제어 시스템 (마이크로 펌프, 마이크로 밸브, 마이크로 채널, 마이크로 믹서 등)은 화학, 생명분야의 DNA 분석, 항원-항체 분석, 질병의 진단 등에 사용되는 lab-on-a-chip, micro total analysis system ($\mu$-TAS) 등에서 화학 및 바이오 유체를 제어하는 분석 시스템의 일부분으로서 사용되며 필수적으로 요구된다. 본 논문에서는 이러한 microchip을 구현하기 위해 초미세 유체 제어 소자인 마이크로 펌프와 밸브를 같은 기관 위에 polydimethylsiloxane (PDMS)와 indium tin oxide (ITO)-Glass를 사용하여 동일한 구조로 집적 하였다. 마이크로 펌프의 pumping rate은 인가 직류 펄스 전력의 주파수와 duty 비를 변화시켜 최적화하였다. 직류 펄스 전력 500 mW를 인가하였을 때 주파수 2 Hz, duty 비 7 %에서 약 $1.05{\mu}l/min$의 최대 유량이 측정되었다. 마이크로 밸브는 ITO 히터에 전력을 인가함으로서 유량의 on/off 제어가 잘 됨을 확인할 수 있었고 유체를 closing하기 위해 필요한 전력은 약 300 mW이다.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.1-8
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• 2002

Most of the traditional embedded web server systems have been designed for monitoring and controlling some dedicated equipments. Hence, not only they have no generality and flexibility but also they are too expensive for the lower-cost domestic equipment. To cope with these difficulty, we suggest a lower-cost ${\mu}$-embedded web server model which is suitable for monitoring and controlling the industry or house equipments by using the internet. The suggested model is based on an one-chip ${\mu}$-processor in which the ISP (In-System Programming) function and flash ROM are embedded basically to minimize the cost of H/W and S/W. Also it allows to add an new function dynamically to provide the generality and flexibility. Finally, to evaluate the feasibility of the suggested model, we have manufactured a test-board based on the ATMega103 ${\mu}$-processor and programmed the control program and tested it on the MS Explorer 5.0 environment.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.71-81
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• 2008

In this paper, we propose a novel Globally Asynchronous, Locally Dynamic System(GALDS) bus and demonstrate its performance. The proposed GALDS bus is the bidirectional multitasking bus with the segmented bus architecture supporting the concurrent operation of multi-masters and multi-slaves. By analyzing system tasks, the bus architecture chooses the optimal frequency for each If among multiples of bus frequency and thus we can reduce the overall power consumption. For efficient data communications between IPs operating in different frequencies, we designed an asynchronous and bidirectional FIFO based on an asynchronous wrapper with hand-shaking interface. In addition, since systems can be easily expandable by inserting bus segments, the proposed architecture has advantages in IP reusability and structural flexibility As a test example, a four-segment bus haying four masters and four slaves were designed by using Verilog HDL. We demonstrate multitasking operations with read/write data transfers by simulation when the ratios of operation frequency are 1:1, 1:2, 1:4 and 1:8. The data transfer mode is a 16 burst increment mode compatible with Advanced Microcontroller Bus Architecture(AMBA). The maximum operation latency of the proposed GALDS bus is 22 clock cycles for the bus write operation, and 44 clock cycles for read.

• Korean Journal of Optics and Photonics
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• v.14 no.5
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• pp.504-508
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• 2003

We present a new point-diffraction interferometer, which has been devised for the three-dimensional profile measurement of light scattering rough surfaces. The interferometer system has multiple sources of two-point-diffraction and a CCD camera composed of an array of two-dimensional photodetectors. Each diffraction source is an independent two-point-diffraction interferometer made of a pair of single-mode optical fibers, which are housed in a ceramic ferrule to emit two spherical wave fronts by means of diffraction at their free ends. The two spherical wave fronts then interfere with each other and subsequently generate a unique fringe pattern on the test surface. A He-Ne source provides coherent light to the two fibers through a 2${\times}$l optical coupler, and one of the fibers is elongated by use of a piezoelectric tube to produce phase shifting. The xyz coordinates of the target surface are determined by fitting the measured phase data into a global model of multilateration. Measurement has been performed for the warpage inspection of chip scale packages (CSPs) that are tape-mounted on ball grid arrays (BGAs) and backside profile of a silicon wafer in the middle of integrated-circuit fabrication process. When a diagonal profile is measured across the wafer, the maximum discrepancy turns out to be 5.6 ${\mu}{\textrm}{m}$ with a standard deviation of 1.5 ${\mu}{\textrm}{m}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.451-459
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• 2007

RFID it reads information which is it writes, the semiconductor chip for and the radio frequency system which uses the hazard antenna it has built-in transmission of information it talks. Formation which is transmitted like this collection and America which it filtrates wey the RFID search service back to inform the location of the server which has commodity information which relates with an object past record server. The hazard where measurement analysis result the leader for electronic interference does not occur consequently together from with verification test the power level which is received from the antenna grade where it stands must maintain minimum -55dBm and the electronic interference will not occur with the fact that, antenna and reel his recognition distance the maximum 7m until the recognition which is possible but smooth hazard it must stand and and with the fact that it will do from within and and and 3-4m it must be used Jig it is thought.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.520-523
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• 2016

This paper describes a DC-DC converter with MPPT control for thermoelectric energy harvesting. The designed circuit converts low voltage harvested from a thermoelectric generator into higher voltage for powering a load. A start-up circuit supplies VDD to a controller, and the controller turns on and off a NMOS switch of a main-boost converter. The converter supplies the boosted voltage to the load through the switch operation. Bulk-driven comparators can do the comparison under low voltage condition and are used for voltage regulation. Also, bulk-driven comparators raise system's efficiency. A peak conversion efficiency of 76% is achieved. The proposed circuit is designed in a 0.35um CMOS technology and its functionality has been verified through simulations. The designed chip occupies $933um{\times}769um$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.8
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• pp.9-16
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• 2007

Currently, the measurement of RF parameters for a base station in operation is typically limited to easily measured forward path items. In this paper, the forward monitoring ports of base stations are used to measure the reverse RF performance. The system has been implemented and effectiveness has been proven on an operating base station. The receiver sensitivity is measured using an internal CDMA modem which is used to monitor the output power based on closed loop power control when the modem is connected to the base station via a voice call. In order to improve accuracy, in addition to the modem Tx adjust(TxAdj) parameter, the detector's actual measurement is used. For accurate receiver sensitivity, the measurement should be made when there is no traffic which is not possible on an operating base station. Therefore, pilot channel chip energy to received signal power spectral density ratio$(E_c/I_o)$ compensation method is used to offset the receiver sensitivity degradation with voice traffic increase.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.1
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• pp.21-31
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• 2017

In this paper, the Zynq system-on-chip (SoC) platform is used to design an adaptive noise reduction and edge-detection system using partial reconfiguration. Filters are implemented in a partially reconfigurable (PR) region to provide high computational complexity in real-time, 1080p video processing. In addition, partial reconfiguration enables better utilization of hardware resources in the embedded system from autonomous replacement of filters in the same PR region. The proposed edge-detection system performs adaptive noise reduction if the noise density level in the incoming video sequences exceeds a given threshold value. Results of implementation show that the proposed system improves the accuracy of edge-detection results (14~20 times in Pratt's Figure of Merit) through self-reconfiguration of filter bitstreams triggered by noise density level in the video sequences. In addition, the ZyCAP controller implemented in this paper enables about 2.1 times faster reconfiguration when compared to a PCAP controller.