• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.33 no.9B
• /
• pp.745-750
• /
• 2008

In a cognitive radio based system, quality of service (QoS) for the secondary user must be maintained as much as possible even while that of the primary user is protected all he time. In particular, switching wireless links for the secondary user during the transmission of multimedia data causes delay and information loss, and QoS degradations occur inevitably. The efficient resource management scheme is necessary to support the seamless multimedia service to the secondary user. This paper proposes a novel frequency selection method based on Multi-Criteria Decision Making (MCDM), in which uncertain parameters such as received signal strength, cell load, data rate, and available bandwidth are considered during the decision process for the frequency selection with the fuzzy set theory. Through simulation, we show that our proposed frequency selection method provides a better performance than the conventional methods which consider the received signal strength only.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.11a
• /
• pp.135-136
• /
• 2006

Bismuth titanate ($Bi_4Ti_3O_{12}$, BIT) thin film has been studied intensively in the past decade due to its large remanent polarization, low crystallization temperature, and high Curie temperature. Substitution of various trivalent rare-earth cations (such as $La^{3+}$, $Nd^{3+}$, $Sm^{3+}$ and $Pr^{3+}$) in the BIT structure is known to improve its ferroelectric properties, such as remanent polarization and fatigue characteristics. Among them, neodymuim-substituted bismuth titanate, ((Bi, Nd)$_4Ti_3O_{12}$, BNT) has been receiving much attention due to its larger ferroelectricity. In this study, Ferroelectric $Bi_{3.3}Nd_{0.7}Ti_3O_{12}$ thin films were successfully fabricated by liquid delivery MOCVD process onto Pt(111)/Ti/$SiO_2$/Si(l00) substrates. Fabricated polycrystailine BNT thin films were found to be random orientations, which were confirmed by X-ray diffraction and scanning electron microscope analyses. The remanent polarization of these films increased with increase in annealing temperature. And the film also demonstrated fatigue-free behavior up to $10^{11}$ read/write switching cycles. These results indicate that the randomly oriented BNT thin film is a promising candidate among ferroelectric materials useful for lead-free nonvolatile ferroelectric random access memory applications.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.42 no.7 s.337
• /
• pp.21-26
• /
• 2005

An area efficient, low power switch-matrix semidigital FIR reconstruction filter for delta-sigma D/A converter is proposed. Filter coefficients are quantified to 7-bit and 7 current sources that correspond to each coefficient bit are used. The proposed semidigital FIR reconstruction filter is designed in a 0.25 um CMOS process and incorporates 1.5 mm$^{2}$ of active area and a power consumption is 3.8 mW at 2.5 V supply. The number of switching transistors is 1419 at 205 filter order. Simulation results show that the filter output has a dynamic range of 104 dB and 84 dB attenuation of out-of-band quantization noise.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.4
• /
• pp.506-517
• /
• 2015

This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.8
• /
• pp.24-31
• /
• 2008

Power converters are becoming an essential block in modem mobile multimedia application. This paper presents a high performance DC-DC buck converter for mobile applications. Controller of DC-DC buck converter is designed by current-mode control method. An current-mode DC-DC converter is implemented in a standard $0.18{\mu}m$ CMOS process, and the overall die size was $1.2mm^2$. The peak efficiency was 86 % with a switching frequency of $1\sim1.5MHz$ and a maximum load current of 400mA.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.5 no.6
• /
• pp.625-630
• /
• 2010

With regard to the examples of establishing various sorts of information security, it can be seen that there are gradual, developmental procedures including Firewall and VPN (Virtual Private Network), IDS (Intrusion Detection System), or ESM(Enterprise Security Management). Each of the security solutions and equipments analyzes both defense and attack for information security with the criteria of classifying the problems of security policies by TCP/IP layers or resulted from attack patterns, attack types, or invasion through specialized security technology. The direction of this study is to examine latency time vulnerable to invasion which occurs when L2-stratum or lower grade equipments or policies are applied to the existing network through TCP/IP layer's L3-stratum or higher grade security policies or equipments and analyze security holes which may generate due to the IP preoccupation in the process of establishing policies to limit particular IP area regarding the policies for security equipments to figure out technological problems lying in it.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.8
• /
• pp.1734-1740
• /
• 2012

In this paper, we propose a FSOURCE circuit which requires such a small switching current that an eFuse OTP memory can be programmed in the post-package state of the PMIC chips using a single power supply. The proposed FSOURCE circuit removes its short-circuit current by using a non-overlapped clock and reduces its maximum current by reducing the turned-on slope of its driving transistor. Also, we propose a DOUT buffer circuit initializing the output data of the eFuse OTP memory with arbitrary data during the power-on reset mode. We design a 24-bit differential paired eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $381.575{\mu}m{\times}354.375{\mu}m$($=0.135mm^2$).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.1
• /
• pp.197-204
• /
• 2010

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

• Journal of IKEEE
• /
• v.2 no.2 s.3
• /
• pp.270-277
• /
• 1998

As the network technologies advance, the control systems progress from a centralized architecture to a distributed one. However, these control systems were designed mostly based on the general-purpose operating systems(OS) and have many problems for assurance of a real-time property required for plant processing fields. Therefore, the control systems far a plant process upon real-time OS hare been increased gradually. In this paper, the real-time OS emphasizes on the realization of real-time processing capability, reliability of real-time response, and multi-processing functionality which are prerequisites for a distributed control system. And on the basis of this OS, the number of executable loop and logic, the functions of main plant processing, was analyzed and its validity was also evaluated. The system in this paper was designed not to effect on processing data while online, and the time spent on switching was measured.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.2
• /
• pp.159-164
• /
• 2016

A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of $0.35{\mu}m$ process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of $2{\mu}m$, the switch MOS Width of $0.3{\mu}m$ and dummy MOS Width of $13{\mu}m$ in 1MHz switching operation. The power consumption was calculated with $3.7{\mu}W$ at the supply voltage of 1.2 V, near-threshold voltage.