• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.276-281
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• 2011

This paper presents a method of constructing the switching function using edge-valued decision diagrams. The proposed method is as following. The edge-valued decision diagram is a new data structure type of decision diagram which is recently used in constructing the digital logic systems based on the graph theory. Next, we apply edge-valued decision diagram to function minimization of digital logic systems. The proposed method has the visible, schematic and regular properties.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.9
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• pp.1965-1970
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• 2011

This paper proposes the method of switching function implementation using switching function extraction based on graph over finite fields. After we deduce the matrix equation from path number of directional graph, we propose the switching function circuit algorithm, also we propose the code assignment algorithm for nodes which is satisfied the directional graph characteristics with designed circuits. We can implement more optimal switching function compare with former algorithm, also we can design the switching function circuit which have any natural number path through the proposed switching function circuit implementation algorithms. Also the proposed switching function implementation using graph theory over finite fields have decrement number of input-output, circuit construction simplification, increment arithmetic speed and decrement cost etc.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.766-767
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• 2015

This paper propose the method of constructing the switching function based on the IATPT. The proposed method have advantage which is the efficiency, regularity and extensibility and so on compare with earlier methods. We expect the proposed the method be able to contribute the constructing the any digital logic systems.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2031-2039
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• 2015

In the LED lighting industry, the dimming function in the LED lamp is required by demands of many consumers. To drive this LED lighting, various types of power converters have been applied. Among them, an LLC resonant converter could be applied for high power LED lighting because of its high efficiency and high power density, etc. The function of power factor correction (PFC) might be added to it. In this paper, a dimmable single-stage asymmetrical LLC resonant converter is proposed. The proposed converter performs both input-current harmonics reduction and PFC using the discontinuous conduction mode (DCM). Also, the lower voltage stress across switching devices as well as the zero voltage switching (ZVS) in switching devices is realized by the proposed topology. It can reduce cost and has high efficiency of the driver. In addition, the regulation of the output power by variable switching frequency can vary the brightness of a light. In the proposed converter, one of the attractive advantages doesn’t need any extra control circuits for the dimming function. To verify the performance of the proposed converter, simulation and experimental results from a 300W prototype are provided.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.41-45
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• 2017

This paper presents a method of constructing the efficiency multiple output switching function of the combinational logic systems. The proposed method reduce the optimized input variable pair and output variable pair after we obtained the final multiple output switching function which was time based multiplexing and obtained the common multiple end node extension logic decision diagram. Also the proposed method have an advantage of the cost, input-output node number, circuit simplification, increment of the arithmetic speed, and more regularity and extensibility compare with previous method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.721-724
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• 2006

This paper presents a method of the constructing the digital logic switching functions and realizing the circuit design using partition techniques. First of all, we introduce the necessity, background and concepts of the partition design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the building block, based on each partition functions. And we apply the proposed method to the example, and we compare the results with the results of the earlier methods. In result, we describe the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.398-399
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• 2019

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.2
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• pp.301-310
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• 2007

Bidirectional DC-DC converters allow transfer of power between two dc sources, in either direction. Due to their ability to reverse the direction of flow of power, Dey are being increasingly used in many applications such as battery charge/dischargers, do uninterruptible power supplies, electrical vehicle motor drives, aerospace power systems, telecom power supplies, etc. This Paper Proposes a new bidirectional Sepic/Zeta converter. It has low switching loss and low conduction loss due to auxiliary communicated circuit and synchronous rectifier operation, respectively Because of positive and buck/boost-like DC voltage transfer function(M=D/1-D), the proposed converter is very desirable for use in distributed power system. The proposed converter also has both transformer-less version and transformer one.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.12
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• pp.2187-2192
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• 2006

This paper presents a method of constructing the universal multiple processing element unit(UMPEU) by De Bruijn Graph. The second method is as following. First, we propose transformation operators in order to construct the De Bruijn UMPEU using properties of graph. Second, we construct the transformation table of De Bruijn graph using above transformation operators. Finally we construct the De Bruijn graph using transformation table. The proposed UMPEU be able to construct the De Bruijn graph for any prime number and integer value of finite fields. Also the UMPEU is applied to fault-tolerant computing system, pipeline class. parallel processing network, switching function and its circuits.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.05a
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• pp.470-471
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• 2018

This paper presents a design method for combinational digital logic systems using time domain based multiplexing and common multi-terminal extension decision diagrams. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.