Journal of the Institute of Electronics and Information Engineers (전자공학회논문지)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Constructing the Efficiency Multiple Output Switching Function of the Combinational Logic Systems

조합논리시스템의 효율적인 다중출력스위칭함수 구성

  • Park, Chun-Myoung (Department of Computer Engineering, Korea National University of Transportation)
  • 박춘명 (한국교통대학교 컴퓨터공학과)
  • Received : 2016.08.30
  • Accepted : 2016.12.18
  • Published : 2017.01.25
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Abstract

This paper presents a method of constructing the efficiency multiple output switching function of the combinational logic systems. The proposed method reduce the optimized input variable pair and output variable pair after we obtained the final multiple output switching function which was time based multiplexing and obtained the common multiple end node extension logic decision diagram. Also the proposed method have an advantage of the cost, input-output node number, circuit simplification, increment of the arithmetic speed, and more regularity and extensibility compare with previous method.

본 논문에서는 조합논리스템의 효율적인 다중출력스위칭함수 구성의 한 가지 방법을 제안하였다. 제안한 방법의 시간영역기반의 멀티플렉싱을 기반으로 공통다중종단노드확장논리결정도를 도출하여 최종 조합논리시스템의 다중출력스위칭함수를 구하므로 기존의 시간영역기반의 멀티플렉싱에 비해 최적화된 입력변수의 쌍과 출력변수 쌍을 상당히 줄일 수 있으며, 또한 코스트 면에서도 유리하다. 또한, 입출력단자 수의 감소, 회로구성의 간략화, 연산속도의 향상 등의 이점이 있으며 기존의 방법에 비해 좀 더 정규성과 확장성이 용이하다.

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