• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.220-221
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• 2016

This paper proposes an active switched-capacitor embedded quasi-Z-source inverter (ASC-EqZSI) topology. In order to improve boost ability, One diode and one switch device are added in the qZSI impedance network, and a single dc source is shifted in series with the inductor in the impedance network. The performances of the proposed topology are verified with simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.129-131
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• 2006

This paper presents a new ZVS-PWM high frequency inverter. The ZVS operation is achieved in the whole load range by using a simple auxiliary reverse blocking switch in parallel with series resonant capacitor. The operating principle and the operating characteristics of the new high frequency circuit treated here are illustrated and evaluated on the basis of simulation results. It was examined that the complete soft switching operation can be achieved even for low power setting ranges by introducing the high frequency dual duty cycle control scheme. In the proposed high frequency inverter treated here, the dual mode pulse modulation control strategy of the asymmetrical PWM in the higher power setting ranges and the lower power setting ones, the output power of this high frequency inverter could introduce in order to extend soft switching operation ranges. Dual duty cycle is used to provide a wide range of output power regulation that is important in many high frequency inverter applications. It is more suitable for induction heating applications the operation and control principle of the proposed high frequency inverter are described and verified through simulated results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.7
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• pp.7-15
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• 2008

A single active capacitor snubber-assisted soft-switching sinewave pulse modulation utility-interactive power conditioner with a three-winding flyback high frequency transformer link and a bidirectional active power switch in its secondary side has been proposed. With the aid of the switched-capacitor quasi-resonant snubber cell, the high frequency switching devices in the primary side of the proposed DC-to-AC sinewave power inverter can be turned-off with ZVS commutation. In addition to this, the proposed power conditioner in the DCM can effectively take the advantages of ZCS turn-on commutation. Its output port is connected directly to the utility AC power source grid. At the end, the prototype of the proposed HF-UPC is built and tested in experiment. Its power conversion conditioning and processing circuit with a high frequency flyback transformer link is verified and the output sinewave current is qualified in accordance with the power quality guidelines of the utility AC interactive power systems.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.163-164
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• 2014

전력계통은 전력수요의 지속적인 성장에 따라서 전력설비의 추가를 지속적으로 추진하고 있지만, 심해지는 환경문제 등으로 인해 용지 확보에 어려움이 있다. 이로 인해 송전선로 장거리화, 용량부족량 등 전력계통에 여러 가지 복잡한 문제가 야기되는데. 이것은 곧 전력계통의 안정도와 직결된다. 이러한 문제를 효과적이면서 경제적인 해결방법으로 FACT(Flexible AC Transmission System)기술이 주목 받고 있다. FACTS 기기 중 SVC(Static Var Compensator)는 상용운전 중이며, 기존 동기조상기에 비해 저렴하고, 신속 정확한 전압제어를 하는 장점이 있다. SVC는 TCR(Thyristor Controlled Reactor)과 TSC(Thyristor Switched Capacitor), FC(Fixed Capacitor)등 여러 종류의 구성을 가지고 있다. 합성시험회로설비(Synthetic Test Circuit)는 Thyristor로 구성된 TCR, TSC Valve를 실제 운전조건으로 동작시켜 SVC Valve의 신뢰성을 검증하는 설비이다. 특히, TSC Valve는 운전시 초기 과전류가 발생하는 운전특성상 이에 대한 평가기준에 따른 시험을 통해 신뢰성을 반드시 검증하여야 한다. 본 논문에서는 IEC 61954에서 제시하는 시험평가 기준에 의거하여 TSC의 Overcurrent Test를 위한 STC 평가 방법를 기술하고 설계된 TSC 시험을 위한 STC topology와 Simulation으로 검증 방법을 기술한다.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1187-1194
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• 2017

In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.

• Journal of Power Electronics
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• v.17 no.3
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• pp.579-589
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• 2017

In this study a new high step-up dc-dc converter is presented. The operation of the proposed converter is based on the capacitor switching and coupled inductor with a single active power switch in its structure. A passive voltage clamp circuit with two capacitors and two diodes is used in the proposed converter for elevating the converter's voltage gain with the recovered energy of the leakage inductor, and for lowering the voltage stress on the power switch. A switch with a low $R_{DS}$ (on) can be adopted to reduce conduction losses. In the generalized mode of the proposed converter, to reach a desired voltage gain, capacitor stages with parallel charge and series discharge techniques are extended from both sides of secondary side of the coupled inductor. The proposed converter has the ability to alleviate the reverse recovery problem of diodes with circuit parameters. The operating principle and steady-states analyses are discussed in detail. A 40W prototype of the proposed converter is implemented in the laboratory to verify its operation.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.6
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• pp.484-489
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• 2020

This study proposes a new soft-switching three-level flying capacitor converter with low filter inductance. The proposed converter can achieve zero voltage switching (ZVS) turn-on of all switches by using auxiliary components La and Ca. It can also reduce filter inductance because the applied voltage of the filter inductor is decreased by using the flying capacitor. Furthermore, filter inductance can be reduced because the operating frequency of the filter inductor is doubled by the phase shifting between switches S3 and S4. The operation principle, design of passive components for ZVS turn-on, interleaving effects, and comparison of different topologies are presented. The experimental waveforms of a 1 kW two-phase interleaved converter prototype are provided to verify the validity of the proposed converter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.45-51
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• 2009

A low-voltage, low-power analog CMOS front-end for a cardiac pacemaker is proposed. The circuits include a 4th order switched-capacitor (SC) filter with a passband of 80-120 Hz and a SC variable gain amplifier whose control range is from 0 to 24-dB with 0.094 dB step. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption, and correlated double sampling technique is used for reducing the finite gain effect of an inverter. The proposed circuit has been designed in a $0.35-{\mu}m$ CMOS process, and it achieves 80-dB SFDR at 5-kHz sampling frequency. The power consumption is only 330 nW at 1-V power supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.43-51
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• 2013

This paper presents a design and implementation of a low power switched-capacitor 3rd-order delta-sigma modulator for a digital hearing-aid application. The power consumption is reduced by minimizing the output swing of integrators through optimizing the coefficients of modulator architecture and using class-AB output operational amplifiers. The modulator was implemented in a 130nm CMOS technology, and measured to have 79dB of SNR(Signal-to-Noise Ratio) in the signal bandwidth between 100Hz and 10kHz with an oversampling ratio of 160. The power consumption was $60{\mu}W$ from 1.2V power supply and the modulator core occupied $0.53mm{\times}0.53mm$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.12
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• pp.4984-4990
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• 2010

In this paper, a Step-down CMOS DC-DC Converter using low power switched capacitor method is designed in a 0.5 ${\mu}m$ technology for the integration of devices. Conventional DC-DC converter is used inductor that can store energy in a magnetic field but have low efficiency because power consumption is caused by magnetic flux. And there were problems with size, weight and price to integrate chip. In this paper, a proposed Inductorless step-down CMOS DC-DC converter of low power using SC method is designed in a 0.5um technology to solve these problems. Designed DC-DC converter have 96% power efficiency with 200kHz frequency by using cadence simulation.