• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.719-722
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• 2003

This work investigates the device degradation p-channel PD SOI devices at various applied voltages as well as stress temperatures with respect to Body-Contact SOI (BC-SOI) and Floating-Body SOI (FB-SOI) MOSFETs. It is observed that the drain current degradation at the gate voltage of the maximum gate current is more significant in FB-SOI devices than in BC-SOI devices. For a stress at the gate voltage of the maximum gate current and elevated temperature, it is worth noting that the $V_{PT}$ Will be decreased by the amount of the HEIP plus the temperature effects. For a stress at $V_{GS}$ = $V_{DS}$ . the drain current decreases moderately with stress time at room temperature but it decreases significantly at the elevated temperature due to the negative bias temperature instability.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2000년도 추계학술대회논문집B
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• pp.124-129
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• 2000

The flow of liquid and vapor is investigated in trapezoidal grooves. The effect of variable shear stress along the interface of the liquid and vapor is studied for both co-current and counter-current flows. Velocity contours and results fur the friction are obtained for both trapezoidal grooves. An approximate relation that was previously utilized for the friction for the liquid was modified to obtain accurate agreement with the results for trapezoidal grooves.

• 대한기계학회논문집B
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• 제31권12호
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• pp.1033-1041
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• 2007

This paper studied the characteristics of performance and temperature in a unit cell of a planar type SOFC under various conditions by employing computational fluid dynamics (CFD). In order to derive thermal stress distribution and performance characteristics, the 3-D model simulation for a single channel was performed in various conditions which include interconnect materials $(LaCrO_3/AISI430)$, gas flow direction (co-flow/counter-flow) and inlet temperature (923 K/1173 K). From these results of a single channel, the most effective conditions were applied to the unit stack with multi-channel and the temperature distribution is displayed. Considering both thermal stress and performance, the best combination is 923 K inlet temperature, counter-flow and interconnector of stainless steel. As the end results, flow, thermal and current density distributions were found in the model with multi-channel applied to the best combination and were concentrated in the middle of channels than in the edge.

• 대한전자공학회논문지
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• 제25권2호
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• pp.182-187
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• 1988

Hot carrier induced device degradation characteristics under DC bias stress have been investigated in n-MOSFETs with channel length of 1.2,1.8 um, and compared with those of LDD structure device with same channel length. Based on these results, the device lifetime in normal operating bias(Vgs=Vds=5V) is evaluated. The lifetimes of conventional and LDD n-MOSFET with channel length of 1.2 um are estimated about for 17 days and for 12 years, respectively. The degradation rate of LDD n-MOSFET under the same stress is the lowest at n-region implnatation dose of 2.5E15 cm-\ulcorner while the substrate current is the lowest at the dose of 1E13cm-\ulcorner Thses results show that the device degradation characteristics are basic measurement parameter to find optimum process conditions in LDD devices and evaluate a reliability of sub-micron device.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.233-236
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• 2000

Polycrystalline Silicon Thin Film Transistors(Poly-Si TFT's), fabricated at temperature lower than $600^{\circ}C$ are now largely used in many applications, particularly in large area electrons. In this work, electrical stress effects on Poly-Si TFT's fabricated by Solid Phase Crystal(SPC) was investigated by measuring electric properities such as transfer and output characteristics, and channel conductance. Consequently, It is turned out that it should be noted the output characteristics, drain current and channel conductance, strongly degrade around origin.

• 한국습지학회지
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• 제23권2호
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• pp.107-115
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• 2021

서해 개야수로 인근의 파랑전파, 해수유동, 퇴적물이동을 분석하기 위해서 각종 인공구조물 설치 전(CASE1W)과 후(CASE2W)로 분류하고, CASE1W와 CASE2W에 대한 계산결과를 비교하였다. 파랑전파에 대해서는 SWAN 수치모형을 이용하여 입사파와 반사파의 결과를 도출하였고, 해수유동에 대해서는 FLOW2DH 수치모형을 이용하여 해수유동에 따른 유속 결과를 도출하였다. SWAN 수치모형과 FLOW2DH 수치모형의 결과는 퇴적물이동을 예측하는 SEDTRAN 수치모형의 입력조건이 되어 개야수로 인근의 최대 저면전단응력과 부유사 농도분포를 계산하였다. SWAN 수치모형 계산결과, CASE2W의 경우 약 7 km 길이의 북측 도류제에 의해서 입사파가 회절 및 중첩되고, 반사파가 생성되어 개야수로 인근의 파고를 CASE1W에 비해 40~50 % 증가시켰다. FLOW2DH 수치모형 계산결과, 북방파제, 북측 도류제 및 금란도에 의해서 개야수로의 유속이 CASE1W과 대비하여 CASE2W가 10~30 % 빠르게 계산되었다. SEDTRAN 수침모형의 계산결과, 복합 파랑장(입사파, 반사파, 조석)에 따른 해양환경과 각종 인공구조물의 설치에 의해서 개야수로의 최대 저면전단응력이 1.0 N/m² 이상인 구간과 부유사농도가 80 mg/L 이상인 구간이 넓게 분포되었다는 것은 개야수로에 퇴적현상이 발생한 것이라고 판단된다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권2호
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• pp.106-113
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• 2006

Electrical properties of $Si_{0.88}Ge_{0.12}(C)$ p-MOSFETs have been exploited in an effort to investigate $Si_{0.88}Ge_{0.12}(C)$ channel structures designed especially to suppress diffusion of dopants during epitaxial growth and subsequent fabrication processes. The incorporation of 0.1 percent of carbon in $Si_{0.88}Ge_{0.12}$ channel layer could accomodate stress due to lattice mismatch and adjust bandgap energy slightly, but resulted in deteriorated current-voltage properties in a broad range of operation conditions with depressed gain, high subthreshold current level and many weak breakdown electric field in gateoxide. $Si_{0.88}Ge_{0.12}(C)$ channel structures with boron delta-doping represented increased conductance and feasible use of modulation doped device of $Si_{0.88}Ge_{0.12}(C)$ heterostructures.

• 전자공학회논문지A
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• 제32A권6호
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• pp.59-66
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• 1995

The hot electron induced effective channel length modulation (${\Delta}L_{H}$) and HEIP characteristics in PMOSFET's after bidirectional stress are presented. Trapped electron charges in gate oxide and lateral field are calculated from the gate current model, and ${\Delta}L_{H}$(${\Delta}L_{HD},\;{\Delta}L_{HS}$) is calculated using trapped electron charges and lateral field. It has been found that ${\Delta}I_{d}$and ${\Delta}L_{H}$ are more affected by the stress order (Forward-Reverse of Reverse or Reverse-Forward) than the stress direction, and they vary logarithmically with the stress time. In contrast, ${\Delta}V_{t}$ and ${\Delta}V_{pt}$ are more affected by the stress direction thatn the stress order. The correlation between ${\Delta}V_{pt}$ and the stress time can be explanined as the following polynomial functin: ${\Delta}V_{pt}$=AT$^{n}$. It has also been shown that PMOSFET degradation is related with the gate current and the effects of ${\Delta}V_{pt}$ is the most significant.

• 한국전기전자재료학회논문지
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• 제31권3호
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• pp.135-140
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• 2018

Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.

• 대한토목학회논문집
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• 제26권5B호
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• pp.469-479
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• 2006

본 연구에서는 사행수로에서 주 흐름과 이차류의 특성을 정량적으로 분석하고자 중심각이 $150^{\circ}$이고 사행도 1.52인 S자형 사행수로에서 실험을 수행하였다. 평균수심과 유량을 달리하여 다양한 실험 조건 하에서 수행한 실험을 통해 다중 만곡부를 갖는 사행수로에서 이차류의 공간적 변화양상을 관찰하였다. 실험결과, 주 흐름은 실험조건에 관계없이 직선구간에서 좌우 대칭적인 유속분포를 보였고, 만곡부에서는 내안쪽에 최대유속이 발생하고 외안쪽에 최소유속이 발생하는 현상을 발견 할 수 있었다. 이렇게 주 흐름이 최단노선을 따라 발생하는 현상은 기존 연구자들의 결과와 일치하는 것이다. 이차류의 거동은 첫번째 만곡부보다 두 번째 만곡부에서 더욱 활발하게 발달하고 외안 회전류가 뚜렷히 나타남을 발견하였다. 이차류의 강도는 직선구간에서는 낮게 나타나고 만곡부에서는 증가하는 주기적인 현상을 보였으며, 만곡부의 이차류 강도가 직선구간보다 2~3배 크게 나타났다. 또한, 두 번째 만곡부에서 이차류 강도의 최대값이 발생했다. 주 흐름방향의 난류 강도와 Reynolds 전단응력을 분석한 결과, 주 흐름 난류 강도는 주 흐름의 유속편차가 클수록 증가하는 것으로 나타났고 Reynolds 전단응력은 주 흐름방향 유속의 편차가 크게 벌어지는 동시에 이차류가 활발히 생성되는 지점에서 크게 나타나는 경향을 보였다.