• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.911-916
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• 2007

The home gateway, an equipment which works as an gateway for ubiquitous home network, relays all functions of a home network. The home gateway must always be connected in order to provide seamless services. However it gives unfavorable power consumption. Therefore the needs for working in maximum power saving mode while there is no data traffic and for invoking to the normal function when it is necessary. In this paper we survey the technical papers and the standards documents and provide an overview of power saving mode in the home gateway.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3A
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• pp.221-229
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• 2007

In this paper, we propose and analyze the optimized sleep mode for a mobile node (MN) in IEEE 802.16e wireless metropolitan area networks. Because a MN in a sleep mode specified in 802.16e specification should maintain state information with the base station currently attached, it must renew sleep state with a new base station after handover which leads to unnecessary waste of battery power. Noting that the mobility pattern of a MN is independent of call arrival patterns, we propose an optimized sleep mode to eliminate unnecessary standby period of a MN in sleep state after handover. We also propose an analytical model for the proposed scheme in terms of power consumption and the initial call response time. Simulation studies that compare the performance between the sleep mode and the optimized sleep mode show that our scheme marginally increases initial call response delay with the huge reduction in power consumption.

• ETRI Journal
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• v.27 no.4
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• pp.439-445
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• 2005

We introduce a strained-SiGe technology adopting different thicknesses of Si cap layers towards low power and high performance CMOS applications. By simply adopting 3 and 7 nm thick Si-cap layers in n-channel and p-channel MOSFETs, respectively, the transconductances and driving currents of both devices were enhanced by 7 to 37% and 6 to 72%. These improvements seemed responsible for the formation of a lightly doped retrograde high-electron-mobility Si surface channel in nMOSFETs and a compressively strained high-hole-mobility $Si_{0.8}Ge_{0.2}$ buried channel in pMOSFETs. In addition, the nMOSFET exhibited greatly reduced subthreshold swing values (that is, reduced standby power consumption), and the pMOSFET revealed greatly suppressed 1/f noise and gate-leakage levels. Unlike the conventional strained-Si CMOS employing a relatively thick (typically > 2 ${\mu}m$) $Si_xGe_{1-x}$ relaxed buffer layer, the strained-SiGe CMOS with a very thin (20 nm) $Si_{0.8}Ge_{0.2}$ layer in this study showed a negligible self-heating problem. Consequently, the proposed strained-SiGe CMOS design structure should be a good candidate for low power and high performance digital/analog applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.10
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• pp.31-39
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• 2009

This paper presents the single supply power line communication(PLC) SoC ASIC with built-in analog frond-end circuit. To achieve the low power consumption along with low chip cost, this PLC SoC ASIC employs fully CMOS analog front-end(AFE) and several built-in Regulators(LDOs) powering for Core logic, ADC, DAC and IP Pad driver. The AFE includes RX of pre-amplifier, Programmable gain amplifier and 10 bit ADC and TX of 10bit Digital Analog Converter and Line driver. This PLC Soc was implemented with 0.18um 1 Poly 5 Metal CMOS process. The single power supply of 3.3V is required for the internal LDOs. The total power consumption is below 30mA at standby and 300mA at active which meets the eco-design requirement. The chips size is $3.686\;{\times}\;2.633\;mm^2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.94-100
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• 2017

Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

• Journal of IKEEE
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• v.16 no.3
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• pp.265-273
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• 2012

Data stability and leakage power dissipation have become a critical issue in scaled SRAM design. In this paper, an advanced 8T SRAM cell improving the read and write stability of data storage elements as well as reducing the leakage current in the idle mode is presented. During the read operation, the bit-cell keeps the noise-vulnerable data 'low' node voltage close to the ground level, and thus producing near-ideal voltage transfer characteristics essential for robust read functionality. In the write operation, a negative bias on the cell facilitates to change the contents of the bit. Unlike the conventional 6T cell, there is no conflicting read and write requirement on sizing the transistors. In the standby mode, the built-in stacked device in the 8T cell reduces the leakage current significantly. The 8T SRAM cell implemented in a 130 nm CMOS technology demonstrates almost 100 % higher read stability while bearing 20 % better write-ability at 1.2 V typical condition, and a reduction by 45 % in leakage power consumption compared to the standard 6T cell. The stability enhancement and leakage power reduction provided with the proposed bit-cell are confirmed under process, voltage and temperature variations.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.2
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• pp.129-135
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• 2015

This study, in the operation of street lamp, suggests appropriate algorithm to extend the number of days of street lamp operation as much as possible if the number of sunless days continues and experimentally determines the value of Weather Factor necessary for this algorithm. This is conducted by reducing electricity consumption and securing battery remains through the use of standby power mode, in which maximum amount of light is maintained if there is a pedestrian, and constant brightness is maintained without utilizing maximum electric power if no pedestrians exist, with the application of WFactor value created by the algorithm considering weather forecast and amount of sunlight.

• Transactions of the Korean Society of Automotive Engineers
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• v.24 no.4
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• pp.401-407
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• 2016

For high fuel economy, many kinds of unit in vehicle have been developed. In steering system, as a result, HPS(Hydraulic Power Steering) system has been replaced as EHPS and EPS system. But the structures of these systems are totally different, and that causes the uncertainty of fuel economy evaluation. Therefore we undertake to research to find results and tendency of fuel economy and energy in steering system. For accurate evaluation, we modeled different types of steering systems on same vehicle model. The simulation came into action on various driving cycle. The driving condition is designed to show standby power of pump. Results show differences of fuel efficiency and energy consumption.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.5
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• pp.638-644
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• 2010

This paper presents ideas of service scenarios for home residents using electric power monitoring system per appliance, the implementation of the monitoring system, and analysis of acquired electric power usage pattern. By acquiring and analyzing electric power usage pattern, home residents can get information of power usage pattern of every legacy (non-Demand Response-ready) appliance. Further they can get pieces of recommendation how to reduce energy consumption, intelligent standby power blocking service, and alarming service to abnormality of appliances. In order to check the feasibility of the ideas, a system that can acquire electric power pattern per appliance is implemented, and electric power pattern of some appliances are stored to a database and it was analyzed to show if auto-identification of a type of a device is possible, which is a basic required function for the scenarios presented.

• Journal of Korea Society of Industrial Information Systems
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• v.16 no.1
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• pp.1-8
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• 2011

Efficient power management plays a crucial role to strengthen competitiveness in the market of portable mobile commodities. This paper presents a proactive power management technique, called by Energy-Aware Scheduling policY (EASY), to exploit the sleep time information of running applications. Different from previous power management approaches focusing on power conservation in standby mode, the proposed scheme characterizes each application program's operational characteristic in active mode by observing how long the task stays in sleep state of CPU scheduler. Based on the measured sleep time, the proposed EASY speculates an adequate CPU clock frequency according to the current CPU workload and scales the frequency directly to the predicted one. Experimental results show that the proposed scheme reduces the power consumption by 10-30% on average compared to traditional DPM approach, with a minimal impact on the performance overhead.