• Title/Summary/Keyword: Spurious free dynamic range(SFDR)

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The Development of the Multi-function Radar Signal Processor Having the High Spurious Free Dynamic Range (불요신호 특성이 우수한 다기능레이더 신호처리기 개발)

  • Lee, Hee-Young
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.1
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    • pp.140-146
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    • 2010
  • The multi-function radar can detect and track the low RCS targets. For this purpose the multi-function radar uses the pulse train waveform. because this waveform has high dynamic range and good SNR(Signal to Noise Ratio). But the spurious signals can also be detected by processing the pulse train waveform. Thus the multi-function radar signal processor must have the high SFDR(Spurious Free Dynamic Range). This paper describes the development of the multi-function radar signal processor having the high SFDR.

Development of a SHA with 100 MS/s for High-Speed ADC Circuits (고속 ADC 회로를 위한 100 MS/s의 샘플링의 SHA 설계)

  • Chai, Yong-Yoong
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.2
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    • pp.295-301
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    • 2012
  • In this article, we have designed SHA, which has 12 Bit resolution at an input signal range of 1 $V_{pp}$ and operates at a sampling speed of 100 MS/s in order to use at front of high speed ADC. SFDR(Spurious Free Dynamic Range) of the proposed system drops to approximately 66.3 dB resolution when the input frequency is 5 MHz, and the sampling frequency is 100 MHz, however, the circuit without a feedthrough has 12 bit resolution with approximately 73 dB.

Receiver Gain of Active Phased Array Radar-Dependence on ADC Characteristic (ADC 특성에 따른 능동 위상 배열 레이더 수신기의 이득 설정 방법)

  • Kim, Tae-Hwan;Choi, Beyung-Gwan;Lee, Hee-Young;Cho, Choon-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.1
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    • pp.52-59
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    • 2009
  • In modern radars, dynamic range requirements far severed due to high CNR(Clutter-to-Noise Ratio) environment operation scenario. ADC spurious signal restricted the required dynamic range. In this paper, receiver gain of active phased array radar dependent on ADC nonlinear characteristic was analyzed. Within limited scope of ADC SFDR which blocks required system dynamic range, ADC dynamic range reaches trade-off with ADC SNR loss. Comparing antenna stage output noise voltage to that of ADC input, receiver gain was mathematically analyzed. Finally the whole contents were explained from the application example.

A Low-Power 1 Ms/s 12-bit Two Step Resistor String Type DAC in 0.18 ㎛ CMOS Process (0.18 ㎛ CMOS 공정을 이용한 저 전력 1 Ms/s 12-bit 2 단계 저항 열 방식 DAC)

  • Yoo, MyungSeob;Park, HyungGu;Kim, HongJim;Lee, DongSoo;Lee, SungHo;Lee, KangYoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.5
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    • pp.67-74
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    • 2013
  • A low-power 12-bit resistor string DAC for wireless sensor applications is presented. Two-step approach reduces complexity, minimizes power consumption and area, and increases speed. This chip is fabricated in 0.18-${\mu}m$ CMOS and the die area is $0.76mm{\times}0.56mm$. The measured power consumption is 1.8mW from the supply voltage of 1.8V. Measured SFDR(Spurious-Free Dynamic Range) is 70dB when the sampling frequency is less than 1 MHz.

A 67.5 dB SFDR Full-CMOS VDSL2 CPE Transmitter and Receiver with Multi-Band Low-Pass Filter

  • Park, Joon-Sung;Park, Hyung-Gu;Pu, Young-Gun;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.4
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    • pp.282-291
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    • 2010
  • This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 ${\mu}m$ CMOS technology and the die area is 5 mm $\times$ 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.

Nonlinearity Compensation of Electroabsorption Modulator by using Semiconductor Optical Amplifier (반도체 광증폭기를 이용한 전계흡수 광변조기 비선형성 보상)

  • Lee, Chang-Hyeon;Son, Seong-Il;Han, Sang-Guk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.5
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    • pp.23-30
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    • 2000
  • To compensate the nonlinearity of electroabsorption modulator(EAM) resulting from its near exponential transfer function, a semiconductor optical amplifier(SOA) that has a log transfer function is used. Since the transfer function of SOA is inverse to that of EAM, the intermodulation distortion(IMD) of EAM can be reduced by cascading SOA to EAM. Also, the RF gain can be increased by the optical gain of SOA. For these reasons, spurious free dynamic range(SFDR) of EAM is enhanced by connecting SOA to EAM in series and operating in gain salutation region. To improve the nonlinearity compensation of EAM, the increased gain of SOA is required and the slope of gain saturation, the ratio of gain to input SOA power, needs to be steep. However, signal spontaneous beat noise that is the dominant system noise increases in proportion to the gain such that the SFDR of EAM is reduced. The higher the gain of SOA is, the more ASE is increased. Thus the noise level of system is increased and the following SFDR of EAM is decreased. The slope of gain saturation region and ASE of have trade-off relation and the optimization is achieved at 8㏈ optical gain. 9㏈ enhancement of SFDR of EAM is obtained. This scheme is easy to embody the linear EAM and the integration with three components (DFB-LD, EAM and SOA) offers many merits, such as low insertion loss, low chirping and low polarization sensitivity.

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Design and Measurement of Active Phased Array Radar Digital Receiver (능동 위상 배열 레이더의 디지털 수신기 제작 및 측정)

  • Kim, Tae-Hwan;Lee, Sung-Ju;Lee, Dong-Hwi;Hong, Yun-Seok;Cho, Choon-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.371-379
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    • 2011
  • Active phased array antenna structure is used for modern multi-function radars. To search targets in high clutter environment, the radar receiver needs high dynamic range performance. Though active phased array antenna structure lead to increase of SNR, the SFDR is not increased. In this paper, high SFDR receiver of X-band active phased array radar was designed and manufactured. One channel digital receiver is connected to 32 T/R modules and one PCB assembly is composed to 2 channel digital receivers with RF part, ADC part, LO distribution part and digital down conversion part. A commercial FIFO board was used for digital receiver measurement about major performance in digital output signal condition. The measured digital receiver gain and SFDR is 33 dB and more than 81 dBc each.

MMWP 아날로그 광송수신기의 설계

  • 최영완
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.301-304
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    • 1999
  • 밀리미터파 대역의 아날로그 광전송을 위한 진행파형 (travel ing wave, TW) 전계흡수 광변조기 (electroabsorption modulator, EAM)와 광수신기의 설계에 대해 발표하고자 한다. TW EAM 및 TW 광수신기의 일반적인 형태인 ridge-type의 co-planar waveguide (CPW)구조에서의 마이크로파의 전송특성을 3차원 FDTD로 분석하여 광파와 전파의 속도 정합 등을 이루는 최적화 구조를 설계하였다. TW EAM의 경우 광세기 변조의 비선형 응답특성에 있어서 마이크로파 손실과 소자길이가 RF 신호의 혼변조 왜곡 (intermodulation distortion)과 SFDR (spurious free dynamic range)성능에 미치는 영향도 이론적으로 조사하였다. TW PIN 광수신기의 경우 광파와 마이크로파의 속도정합의 영향과 이전에는 고려되지 않았던 photo-generated 전송자의 진성 영역에서의 transit time이 광수신기의 밴드 폭에 미치는 영향을 분석하여 최적화 설계하였다.

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A 10-bit 100Msample/s Pipeline ADC with 70dBc SFDR (SFDR 70dBc의 성능을 제공하는 10비트 100MS/s 파이프라인 ADC 설계)

  • Yeo, Seon-Mi;Moon, Young-Joo;Park, Kyong-Tae;Roh, Hyoung-Hwan;Park, Jun-Seok;Oh, Ha-Ryoung;Seong, Yeong-Rak;Jung, Myeong-Sub
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.1444-1445
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    • 2008
  • 최근 Wireless Local Area Network(WLAN), Wide-band Code Division Multiple Access(WCDMA), CDMA2000, Bluetooth 등 다양한 모바일 통신 시스템에 대한 수요가 증가하고 있다. 이와 같은 모바일 통신 시스템에는 70dB이상의 SFDR(Spurious Free Dynamic Range)을 가진 ADC(Analog-to-Digital Converter)가 사용된다. 본 논문에서는 모바일 통신 시스템을 위한 SFDR 70dBc의 성능을 제공하는 10비트, 100Msps 파이프라인 ADC를 제안한다. 제안한 ADC는 요구되는 해상도 및 속도 사양을 만족시키기 위해 3단 파이프라인 구조를 채택하였으며, 입력단 SHA(Sample and Hold)회로에는 Nyquist 입력에서도 10비트 이상의 정확도로 신호를 샘플링하기 위해 부트스트래핑 기법 기반의 샘플링 스위치를 적용하였다. residue amplifier 회로에는 전력을 줄이기 위해 8배 residue amplifier 대신 3개의 2배 ressidue amplifier를 사용하였다. ADC의 높은 사양을 만족시키기 위해서는 높은 이득을 가지는 op-amp가 필수적이다. 제안한 ADC 는 0.18um CMOS 공정으로 설계되었으며, 100Msps의 동작 속도에서 70dBc 수준의 SFDR과 60dB 수준의 SNDR(Signal to Noise and Distortion Ratio)을 보여준다.

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A Multiple Quantum Well Electro-absorption Modulator for Broadband Picocell Applications (광대역 피코셀 응용을 위한 다중양자우물 광전흡수 변조기)

  • Song, Ju Bin
    • Journal of Advanced Navigation Technology
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    • v.8 no.2
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    • pp.91-97
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    • 2004
  • This paper presents the development of InGaAsP multiple quantum well asymmetric Fabry-Perot modulators(AFPM), which have a vertical structure and high performance and describes measurements of devices operating at 10GHz for next generation broadband wireless communication applications such as picocell systems. Advantages of the AFPM include low drive voltage, which is less than -2V, and -3dB coupling loss, good flatness of the frequency response and simple fiber alignment. A simple link demonstration has been introduced, resulting in 92dB/Hz spurious free dynamic range and 40dB inter-modulation distortion. This modulator could be use for broadband radio over fiber systems such as picocell and multiple RF links.

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