• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.65-68
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• 2013

A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process. A selective solder bumping mechanism without the mask is based on the material design of SBM. Maskless screen printing process can implement easily a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology. Its another advantage is ternary or quaternary lead-free SoP can be formed easily. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 ${\mu}m$ is, successfully, formed.

• ETRI Journal
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• v.37 no.2
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• pp.387-394
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• 2015

A novel interconnection technology based on a 52InSn solder was developed for flexible display applications. The display industry is currently trying to develop a flexible display, and one of the crucial technologies for the implementation of a flexible display is to reduce the bonding process temperature to less than $150^{\circ}C$. InSn solder interconnection technology is proposed herein to reduce the electrical contact resistance and concurrently achieve a process temperature of less than $150^{\circ}C$. A solder bump maker (SBM) and fluxing underfill were developed for these purposes. SBM is a novel bumping material, and it is a mixture of a resin system and InSn solder powder. A maskless screen printing process was also developed using an SBM to reduce the cost of the bumping process. Fluxing underfill plays the role of a flux and an underfill concurrently to simplify the bonding process compared to a conventional flip-chip bonding using a capillary underfill material. Using an SBM and fluxing underfill, a $20{\mu}m$ pitch InSn solder SoP array on a glass substrate was successfully formed using a maskless screen printing process, and two glass substrates were bonded at $130^{\circ}C$.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2006.10a
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• pp.179-212
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• 2006

1. $Welco^{(R)}$ Ultra fine solder powders are suitable for wafer bumping applications; mass production of ultra fine powders with high quality and high yield. - UFP based pastes for wafer bumping by stencil printing ($60-80{\mu}m$ pitch) are now available - Residue free solder flux was developed; meets voids specification of 20%. - F645 type 5 paste is suitable for components 01005

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.55-59
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• 2015

Novel low-volume solder-on-pad (SoP) process is proposed for a fine pitch Cu pillar bump interconnection. A novel solder bumping material (SBM) has been developed for the $60{\mu}m$ pitch SoP using screen printing process. SBM, which is composed of ternary Sn-3.0Ag-0.5Cu (SAC305) solder powder and a polymer resin, is a paste material to perform a fine-pitch SoP in place of the electroplating process. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder; the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. The Si chip and substrate with daisy-chain pattern are fabricated to develop the fine pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si substrate has 6724 under bump metallization (UBM) with a $45{\mu}m$ diameter and $60{\mu}m$ pitch. The Si chip with Cu pillar bump is flip chip bonded with the SoP formed substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of underfill. The optimized interconnection process has been validated by the electrical characterization of the daisy-chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and micro bump interconnection using a screen printing process.

• Proceedings of the KWS Conference
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• 2002.10a
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• pp.456-462
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• 2002

In the present work, a low cost and fine pitch bumping process by electroless Ni/immersion Au UBM (under bump metallurgy) and stencil printing for the solder bump on the Al pad is discussed. The Chip used this experimental had an array of pad 14x14 and zincate catalyst treatment is applied as the pretreatment of Al bond pad, it was shown that the second zincating process produced a dense continuous zincating layer compared to first zincating. Ni UBM was analyzed using Scanning electron microscopy, Energy dispersive x-ray, Atomic force microscopy, and X-ray diffractometer. The electroless Ni-P had amorphous structures in as-plated condition. and crystallized at 321 C to Ni and Ni$_3$P. Solder bumps are formed on without bridge or missing bump by stencil print solder bump process.

• Proceedings of the Materials Research Society of Korea Conference
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• 2001.11a
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• pp.86-86
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• 2001

• Journal of the Microelectronics and Packaging Society
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• v.7 no.1
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.1-26
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• 2004

The implementation of Pb-free solder technology is making good progress in electronic industry. Further understanding on fundamental issues on Pb-free solders/processes is required to reduce reliability risk factors of Pb-free solder joints. Several reliability issues including thermal fatigue, impact reliability, IMC growth, spalling, void formation are reviewed for Pb-free solder joints. Several applications of Pb-free technology are discussed, such as Pb-free, CBGA, CuCGA, flip chips, and wafer bumping by IMS.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.661-662
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• 2006

This research is on a laser soldering using the micro solder-balls used in flip chip packaging process. A laser source used in laser soldering is Nd:YAG laser(250W and 60W). Solder-balls of 100, 300, $500{\mu}m$ size are used in experiments. The laser head to deliver a laser beam and the nozzle to transfer solder-balls are manufactured to bump solder-balls. After soldering solder-balls the shear test is carried out to determine the wetting at the interface between the surface and a solder-balls With the results of solder bumping tests a laminated molding is accomplished for manufacturing the three dimensional molding.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.332-336
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• 2001

In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional Pt layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at $330^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.