• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.8
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• pp.2064-2071
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• 1998

A new digital clock level translator has been designed in order to produce a clock source of the internal logic circuits. The translator output has 50% duty ratio from small sinusoidal input such as TCXO which oscillates itself in poratable components. The circuit consists of positive and negative comparators, RS latch, charge pump, and reference vol- tage generator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator reference, producing output waveform with valid 50% duty ratio of the digital signal level. The designed level translator can be used as a sampling clock source of ADC, PLL and the colck source of the clock synthesizer. The circuit wasdesigned in a 0.8.mu.m analog CMOS technology with double metal, double poly, and BSIM3 circuit simulation model. From our experimental results, a stable operating characteristics of 50 +3% duty ratio was obtained from the sinusoidal input wave of 370 mV.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.12
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• pp.1100-1107
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• 2015

In this paper, we propose an algorithm to identify Wobble PRI and Sinusoidal PRI among Radar pulses. We applied not only the DTOA(Difference Time Of Arrival) concept of radar pulse signals incoming to antennas but also a rising and falling cub characteristic of those PRIs. After making a program by such algorithm, we input each 40 data to Wobble PRI's and Sinusoidal PRI's identification programs and in result, those programs fully processed the data the according to expectations. In the future, those programs can be applied to the ESM, ELINT system.

• Proceedings of the Acoustical Society of Korea Conference
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• 1994.06a
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• pp.873-878
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• 1994

Application of the filtered-x LMS adaptive filter to active noise cancellation requires to estimate the transfer characteristics between the output and the error signal of the adaptive canceller. We analyze the effects of estimation accuracy on the convergence behavior of the canceller when the input noise is modeled as a sinusoid.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• The Transactions of the Korean Institute of Electrical Engineers
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• v.38 no.6
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• pp.431-440
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• 1989

This paper proposes a new PWM cycloconverter which can step up input voltage. With input reactors ac power supply acts as current source, and with output capacitors the balanced output voltage is build-up. The converter is modeled with fourth order state equation using dq transformation and the steady state characteristics are evaluated. It is shown that the proposed converter can generate the output voltage 2-5 times greater than input voltage. The output voltage and input current have sinusoidal and smooth waveforms and the converter is capable of voltage build-up. The characteristics of the proposed converter is verified simulation and experiment.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2006.05a
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• pp.1212-1217
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• 2006

This study is concerned with static and sinusoidal disturbance rejection for a single periodic input disturbance with known period. In the area of active elimination of a disturbance force, the control input should have two different kinds of gains: one is to deliver a stable control and the other is a force component to cancel the external disturbance force. In this paper we employ a simple state feedback control law to make the balance beam stable and employ a linear observer to estimate the states which represent the external disturbance force components. Simulation results verify our proposed control method to reject a static and sinusoidal disturbance force.

• Journal of the Korean Magnetics Society
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• v.22 no.1
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• pp.23-26
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• 2012

New digital feedback algorithm was developed to measure iron loss of soft magnetic materials under a condition of sinusoidal flux waveform. $V_{in}$(B) curve was used instead of H(B) curve to decide next input waveform in the feedback module so that adjusting phases of current waveform, flux waveform, and input waveform could be removed. The effectiveness of the developed algorithm was verified when iron loss of ferrite cores was measured under frequencies of 1 and 10 kHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.4
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• pp.356-362
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• 2015

This paper presents a current control strategy in the synchronous reference frame for a single-phase PWM converter, which ensures sinusoidal input current control under the distorted source voltage and frequency condition. Given that the distorted source voltage distorts the phase angle for PWM converter control, the input current contains the same harmonics as the source voltage. Aside from the distorted voltage, the variation in source frequency reduces the performance of input current control. To achieve sinusoidal input current control under the distorted source voltage and frequency condition, this paper proposes a compensation strategy of current reference with the distortion component extracted from the phase angle and a detection strategy of frequency variation from the output of a synchronous reference frame phase-lock loop. The experimental results confirm the validity of the proposed method under the distorted source voltage and frequency condition.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2274-2277
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• 2003

A cylindrical permanent magnet inside the four-phase permanent magnet (PM) stepping motor is employed as the rotor. The stator has four teeth around, which its coils are wound. The mode of excitation can be classified into 3 modes: single-phase excitation, two-phase excitation and ministep excitation. The ministep drive is a method to subdivide one step into several small steps by means of electronics. The paper presents the programmable ministep technique drive. This technique decodes the results obtained from the counter to locate the data in Read Only Memory (ROM). The Sinusoidal Pulse Width Modulation (SPWM) is transformed to binary file and saved to the ROM. The experiment is performed with the four-phase PM stepping motor and drives from a two-phase programmable sinusoidal ministep signal, instead of square wave. The results show that the performances of the proposed programmable ministep technique drive have high efficiency, smooth step motion, and high speed response. Moreover, the resolution of sinusoidal ministep signal can be controlled by the input frequency (f command).