• The Transactions of the Korean Institute of Power Electronics
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• 제4권2호
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• pp.128-137
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• 1999

Recently the pelionnance of CO2 arc welding machine has been advanced significantly through the adoption of i invelter circuit topology. which made it possible to improve welding perfonnances such as spatter generation and bead s state. But the conventional inverter arc welding machine generates constant output voltage which cause much spatter g generation dUling short-circuit and arc start time because it is unable to control output current instantaneously. So this p paper representes wavefCnm controlled inverter arc welding machine which control the wavefonn of welding current and t thus to suppress the spatter generation. And the system designed in this paper is the digital controller using single chip m microprocessor of 80C196KC. As a result of perfonnance test for this system, the spatter generation is reduced and s shOlt-circuit time period is stabilized compared to conventional one. And more by using switched mode rectifier for A AC/DC power convelter. unity power factor is maintained and low order halmonic spectrum is supressed.

• Journal of the Institute of Electronics and Information Engineers
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• 제50권10호
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• pp.231-238
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• 2013

This paper describes a DC-DC converter IC for Flat Panel Displays. In case of operate LCD devices various type of DC supply voltage is needed. This device can convert DC voltage from 6~14[V] single supply to -5[V], 15[V], 23[V], and 3.3[V] DC supplies. In order to meet current and voltage specification considered different type of DC-DC converter circuits. In this work a negative charge pump DC-DC converter(-5V), a positive charge pump DC-DC converter(15V), a switching Type Boost DC-DC converter(23V) and a buck DC-DC converter(3.3V). And a oscillator, a thermal shut down circuit, level shift circuits, a bandgap reference circuits are designed. This device has been designed in a 0.35[${\mu}m$] triple-well, double poly, double metal 30[V] CMOS process. The designed circuit is simulated and this one chip product could be applicable for flat panel displays.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제36권5B호
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• pp.429-436
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• 2011

The G-PON is an efficient solution to implement the FTTH and have GEM frame to accomodate various protocols like Ethernet frames, IP packets, and TDM signals. Above all, the Ethernet is one of the most widely used 2nd layer protocol in the campus, the subscriber access, and the carrier service. So G-PON system has to provide an Ethernet interface with top priority. In this paper, we implement a gigabit Ethernet adapter based on Ethernet over GEM in the ITU-T G.984.3 to accommodate Ethernet protocol in the G-PON TC chip. The adapter maps each Ethernet frame to a single or multiple GEM frames and has several functions including generation of the GEM header, encapsulation of frames and the SAR. In particular, the adapter have converter (LUT) MAC address to port-ID which is a key to identify logical connections though it is not defined in specification but important. We implement the adapter with a FPGA and verify the functions of segmentation and reassembling, MAC address learning, and throughput with the logic analyzer and the Ethernet analyzer.

• Journal of Korea Technical Association of The Pulp and Paper Industry
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• 제44권5호
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• pp.63-71
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• 2012

This study was carried out to investigate pulping properties of the forest biomass arising from the national forest management operation. The forest biomass was collected and classified into many groups according to their species and age. After the chips were made from the forest biomass, the measurement of chip size and chemical analysis were performed. To make the pulps from the forest biomass, the kraft pulping was applied and thereafter the physical and optical properties of kraft pulps were measured. The pulp fibers from the forest biomass had the similar mean fiber length, but their properties became different according to wood species and ages. Differently from the other species, kraft pulps from chestnut wood had the highest kappa number. Acacia, paulownia and chestnut woods made kraft pulps with lower tensile strength and brightness than the others. It could be concluded that acacia, paulownia and chestnut woods must be screened out in order to make a good quality of kraft pulps while being collected during Forest Management Operation.

• Smart Structures and Systems
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• 제11권3호
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• pp.261-282
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• 2013

Structural health monitoring (SHM) is an application area of Wireless Sensor Networks (WSNs) which usually needs high data communication rate to transfer a large amount of monitoring data. Traditional sink node can only process data from one communication channel at the same time because of the single radio chip structure. The sink node constitutes a bottleneck for constructing a high data rate SHM application giving rise to a long data transfer time. Multi-channel communication has been proved to be an efficient method to improve the data throughput by enabling parallel transmissions among different frequency channels. This paper proposes an 8-radio integrated sink node design method based on Field Programmable Gate Array (FPGA) and the time synchronization mechanism for the multi-channel network based on the proposed sink node. Three experiments have been performed to evaluate the data transfer ability of the developed multi-radio sink node and the performance of the time synchronization mechanism. A high data throughput of 1020Kbps of the developed sink node has been proved by experiments using IEEE.805.15.4.

• Asian-Australasian Journal of Animal Sciences
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• 제27권9호
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• pp.1368-1372
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• 2014

Several studies arduously reported that gayal (Bos frontalis) is an independent bovine species. The population size is shrinking across its distribution. In Bangladesh, it is the only wild relative of domestic cattle and also a less cared animal. Their body size is much bigger than Bangladeshi native cattle and has prominent beef type characters along with the ability to adjust in any adverse environmental conditions. Human interactions and manipulation of biodiversity is affecting the habitats of gayals in recent decades. Besides, the only artificial reproduction center for gayals, Bangladesh Livestock Research Institute (BLRI), has few animals and could not carry out its long term conservation scheme due to a lack of an objective based scientific mission as well as financial support. This indicates that the current population is much more susceptible to stochastic events which might be natural catastrophes, environmental changes or mutations. Further reduction of the population size will sharply reduce genetic diversity. In our recent investigation with 80K indicine single nucleotide polymorphism chip, the $F_{IS}$ (within-population inbreeding) value was reported as $0.061{\pm}0.229$ and the observed ($0.153{\pm}0.139$) and expected ($0.148{\pm}0.143$) heterozygosities indicated a highly inbred and less diverse gayal population in Bangladesh. Prompt action is needed to tape the genetic information of this semi-domesticated bovine species with considerable sample size and try to investigate its potentials together with native zebu cattle for understanding the large phenotypic variations, improvement and conservation of this valuable creature.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제24권6호
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• pp.8-17
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• 2010

This paper proposes a novel LCD CCFL-backlight electronic ballast using the phase-shift full-bridge inverter. The proposed electronic ballast reduces the ignition voltage and eliminates current spikes using the new digital dimming control applied with soft-starting. Thus the electronic ballast improves ignition behavior of the CCFL and hence increases the CCFL's life span. For this, this paper analyzes the full-bridge inverter topology of the proposed electronic ballast and explains the new digital dimming control algorithm applied to the ballast, briefly. And this paper shows a design example of the prototype circuit and explains an implementation method of the digital dimming control which is implemented on a single-chip microcontroller with software. This was implemented as actual prototype electronic ballast, and its experimental results showed that the proposed electronic ballast operates correctly. The ignition voltage of the prototype in the digital dimming operation was reduced about 30[%] compared with the conventional electronic ballast and there were not any current spikes.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제9권7호
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• pp.1497-1501
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• 2005

Branch instructions which make the sequential instruction flow changed cause pipeline stalls in microprocessor. The pipeline hazard due to branch instructions are the most serious problem that degrades the performance of microprocessors. Branch target buffer predicts whether a branch will be taken or not and supplies the address of the next instruction on the basis of that prediction. If the hanch target buffer predicts correctly, the instruction flow will not be stalled. This leads to the better performance of microprocessor. In this paper, the architecture of a ta8 memory that branch target buffer and TLB can share is presented. Because the two tag memories used for branch target buffer and TLB each is replaced by single combined tag memory, we can expect the smaller chip size and the faster prediction. This shared tag architecture is more advantageous for the microprocessors that uses more bits of address and exploits much more instruction level parallelism.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제20권12호
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• pp.2326-2332
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• 2016

In this paper, the proposed small size PLL works stable with the discrete loop filter which is controlled by voltage controlled oscillator's output signal. A switch controlled loop filter is introduced into the proposed PLL instead of a conventional $2^{nd}$-order loop filter. Those three switches are controlled by the very high frequency output signal of voltage controlled oscillator. The switches are also controlled by UP/DN signals and 'on/off' depending the presence of UP/DN signals. A negative feedback functioned capacitor with a switch does make it possible to integrate the PLL into a single chip. The proposed PLL works stably even though a total of small 180pF capacitor used in the discrete loop filter. The proposed PLL has been designed with a 1.8V supply voltage, 0.18um multi - metal and multi - poly layer CMOS process and proved by Hspice simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제21권11호
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.