• 제목/요약/키워드: Silicon thin

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고효율 실리콘 박막태양전지를 위한 신규 수소저감형 비정질실리콘 산화막 버퍼층 개발 (A Novel Hydrogen-reduced P-type Amorphous Silicon Oxide Buffer Layer for Highly Efficient Amorphous Silicon Thin Film Solar Cells)

  • 강동원
    • 전기학회논문지
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    • 제65권10호
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    • pp.1702-1705
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    • 2016
  • We propose a novel hydrogen-reduced p-type amorphous silicon oxide buffer layer between $TiO_2$ antireflection layer and p-type silicon window layer of silicon thin film solar cells. This new buffer layer can protect underlying the $TiO_2$ by suppressing hydrogen plasma, which could be made by excluding $H_2$ gas introduction during plasma deposition. Amorphous silicon oxide thin film solar cells with employing the new buffer layer exhibited better conversion efficiency (8.10 %) compared with the standard cell (7.88 %) without the buffer layer. This new buffer layer can be processed in the same p-chamber with in-situ mode before depositing main p-type amorphous silicon oxide window layer. Comparing with state-of-the-art buffer layer of AZO/p-nc-SiOx:H, our new buffer layer can be processed with cost-effective, much simple process based on similar device performances.

스퍼터링 방법으로 증착된 실리콘 과잉 실리카 박막의 굴절률 분산 (Refractive Index Dispersion of Sputter-Deposited Silicon-Rich Silica Thin Films)

  • 진병규;최용규
    • 한국세라믹학회지
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    • 제46권1호
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    • pp.10-15
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    • 2009
  • We have fabricated silicon-rich silica thin films via RF magnetron sputtering using a SiO target. Thickness evolution and microstructure change of such $SiO_x$ (1$SiO_x$ thin films turned out to be mainly responsible for the increase of refractive index.

전자 싸이클로트론 공명 플라즈마 화학 증착법에 의한 실리콘 질화막 형성 및 특성 연구 (On the silicon nitride film formation and characteristic study by chemical vapor deposition method using electron cyclotron resonance plasma)

  • 김용진;김정형;송선규;장홍영
    • 한국표면공학회지
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    • 제25권6호
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    • pp.287-292
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    • 1992
  • Silicon nitride thin film (SiNx) was deposited onto the 3inch silicon wafer using an electron cyclotron resonance (ECR) plasma apparatus. The thin films which were deposited by changing the SiH4N2 gas flow rate ratio at 1.5mTorr without substrate heating were analyzed through the x-ray photo spectroscopy (XPS) and ellipsometer measurements, etc. Silicon nitride thin films prepared by the electron cyclotron resonance plasma chemical vapor deposition method at low substrate temperature (<10$0^{\circ}C$) exhibited excellent physical and electrical properties. The very uniform and good quality silicon nitride thin films were obtained. The characteristics of electron cyclotron resonance plasma were inferred from the analyzed results of the deposited films.

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박막증착조건 변화에 따른 실리콘 나노결정 박막의 광학적 특성 (Optical properties of nanocrystalline silicon thin films depending on deposition parameters)

  • 김건희;김종훈;전경아;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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    • pp.173-176
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    • 2004
  • Silicon thin films on p-type(100) silicon substrate have been prepared by a pulsed laser deposition(PLD) technique using a Nd:YAG laser. The pressure of the environmental gas during deposition was 1 Torr. After deposition, silicon thin film has been annealed in nitrogen ambient. Strong blue photoluminescence(PL) has been observed at room temperature. We report the optical properties of silicon thin films with the variation of the deposition parameters.

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Thin Film Si-Ge/c-Si Tandem Junction Solar Cells with Optimum Upper Sub- Cell Structure

  • Park, Jinjoo
    • Current Photovoltaic Research
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    • 제8권3호
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    • pp.94-101
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    • 2020
  • This study was trying to focus on achieving high efficiency of multi junction solar cell with thin film silicon solar cells. The proposed thin film Si-Ge/c-Si tandem junction solar cell concept with a combination of low-cost thin-film silicon solar cell technology and high-efficiency c-Si cells in a monolithically stacked configuration. The tandem junction solar cells using amorphous silicon germanium (a-SiGe:H) as an absorption layer of upper sub-cell were simulated through ASA (Advanced Semiconductor Analysis) simulator for acquiring the optimum structure. Graded Ge composition - effect of Eg profiling and inserted buffer layer between absorption layer and doped layer showed the improved current density (Jsc) and conversion efficiency (η). 13.11% conversion efficiency of the tandem junction solar cell was observed, which is a result of showing the possibility of thin film Si-Ge/c-Si tandem junction solar cell.

평판 표시기를 위한 수소화된 비정질실리콘 박막트랜지스터의 제작 (Fabrication of Hydrogenated Amorphous Silicon Thin-Film Transistors for Flat Panel Display)

  • 김남덕;김충기;최광수;장진;이주천
    • 대한전자공학회논문지
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    • 제24권3호
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    • pp.453-458
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    • 1987
  • Amorphous silicon thin-film transtors (TFT's) have been designed and fabricated on glass substrates. The hydrogenated amorphous silicon (a-Si:H) thin-film has been deposited by decomposing silane(SiH4) in hydorgen ambient by rf glow discharge method. Amorphous silicon nitride(a-Si:H) has been chosen as the gate dielectric material. It has been prepared by decomposing the mixed gas of silane(SiH4) and ammonia(NH3). The electrical properties and performance characteristics of the thin-film transistrs have been measured and compared with the requirements for the switching elements in liquid crystal flat panel display. The results show that liquid crystal flat panel displays can be fabricated using the thin-film transistors described in this paper.

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열교환 부품용 발열체 형성기술 (The Formation Technique of Thin Film Heaters for Heat Transfer Components)

  • 조남인;김민철
    • 반도체디스플레이기술학회지
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    • 제2권4호
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    • pp.31-35
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    • 2003
  • We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

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Effects of Neutral Particle Beam on Nano-Crystalline Silicon Thin Film Deposited by Using Neutral Beam Assisted Chemical Vapor Deposition at Room Temperature

  • Lee, Dong-Hyeok;Jang, Jin-Nyoung;So, Hyun-Wook;Yoo, Suk-Jae;Lee, Bon-Ju;Hong, Mun-Pyo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.254-255
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    • 2012
  • Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

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고온에서 제조된 실리콘 주입 p채널 다결정 실리콘 박막 트랜지스터의 전기 특성 변화 연구 (A Study on Electric Characteristics of Silicon Implanted p Channel Polycrystalline Silicon Thin Film Transistors Fabricated on High Temperature)

  • 이진민
    • 한국전기전자재료학회논문지
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    • 제24권5호
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    • pp.364-369
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    • 2011
  • Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

The Influence of Silicon Doping on Electrical Characteristics of Solution Processed Silicon Zinc Tin Oxide Thin Film Transistor

  • Lee, Sang Yeol;Choi, Jun Young
    • Transactions on Electrical and Electronic Materials
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    • 제16권2호
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    • pp.103-105
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    • 2015
  • Effect of silicon doping into ZnSnO systems was investigated using solution process. Addition of silicon was used to suppress oxygen vacancy generation. The transfer characteristics of the device showed threshold voltage shift toward the positive direction with increasing Si content due to the high binding energy of silicon atoms with oxygen. As a result, the carrier concentration was decreased with increasing Si content.