• Journal of Electrical Engineering and Technology
• /
• 제9권6호
• /
• pp.2079-2088
• /
• 2014

In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.

• Transactions on Electrical and Electronic Materials
• /
• 제14권3호
• /
• pp.139-142
• /
• 2013

Silicon nanowire (SiNW) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices were fabricated and their electrical characteristics were analyzed. Compared to planar SONOS devices, these SiNW SONOS devices have good program/erase (P/E) characteristics and a large threshold voltage ($V_T$) shift of 2.5 V in 1ms using a gate pulse of +14 V. The devices also show excellent immunity to short channel effects (SCEs) due to enhanced gate controllability, which becomes more apparent as the nanowire width decreases. This is attributed to the fully depleted mode operation as the nanowire becomes narrower. 3D TCAD simulations of both devices show that the electric field of the junction area is significantly reduced in the SiNW structure.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제11권2호
• /
• pp.80-87
• /
• 2011

Low temperature hole transport characteristics of gate-all-around p-channel metal oxide semiconductor (PMOS) type silicon nanowire field-effect-transistors with the radius of 5 nm and lengths of 44-46 nm are presented. They show coexisting two single hole states randomly switching between each other. Analysis of Coulomb diamonds of these two switching states reveals a variety of electrostatic effects which is originated by the potential of a single hole captured in the trap near the nanowire.

• 전기학회논문지
• /
• 제66권10호
• /
• pp.1494-1498
• /
• 2017

In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

• EDISON SW 활용 경진대회 논문집
• /
• 제3회(2014년)
• /
• pp.434-438
• /
• 2014

CMOS의 최종형태로써 Gate-All-Around(GAA) Silicon Nanowire(NW)가 각광받고 있다. 이 논문에서 NW FET(Field Effect Transistor)의 채널 길이와 NW의 폭과 같은 size에 따른 특성변화를 실제 실험 data와 NW FET 특성분석 simulation을 이용해서 비교해보았다. MOSFET(Metal Oxide Semiconductor Field Effect Transistor)의 소형화에 따른 쇼트 채널 효과(short channel effect)에 의한 threshold voltage($V_{th}$), Drain Induced Barrier Lowering(DIBL), subthreshold swing(SS) 또한 비교하였다. 이에 더하여, 기존의 상용툴로 NW를 해석한 시뮬레이션 결과와도 비교해봄으로써 NW의 size scaling에 대한 EDISON NW 해석 simulation의 정확도를 파악해보았다.

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 2009년도 춘계학술발표대회
• /
• pp.52.1-52.1
• /
• 2009

Cupric oxide (CuO) is a p-type semiconductor with band gap of ~1.7 eV and reported to be suitable for catalysis, lithium-copper oxide electrochemical cells, and gas sensors applications. The nanoparticles, plates and nanowires of CuO were found sensing to NO2, H2S and CO. In this work, we report about the comparison about hydrogen sensing of nano thin film and nanowires structured CuO deposited on single-walled carbon nanotubes (SWNTs). The thin film and nanowires are synthesized by deposition of Cu on different substrate followed by oxidation process. Nano thin films of CuO are deposited on thermally oxidized silicon substrate, whereas nanowires are synthesized by using a porous thin film of SWNTs as substrate. The hydrogen sensing properties of synthesized materials are investigated. The results showed that nanowires cupric oxide deposited on SWNTs showed higher sensitivity to hydrogen than those of nano thin film CuO did.

• Bulletin of the Korean Chemical Society
• /
• 제32권12호
• /
• pp.4371-4376
• /
• 2011

In this work, we investigate the growth behavior of silicon oxide nanowires via a solid-liquid-solid process. Silicon oxide nanowires were synthesized at $1000^{\circ}C$ in an Ar and $H_2$ mixed gas. A pre-oxidized silicon wafer and a nickel film are used as the substrate and catalyst, respectively. We propose two distinctive growth modes for the silicon oxide nanowires that both act as a unique solid-liquid-solid growth process. We named the two growth mechanisms "grounded-growth" and "branched-growth" modes to characterize their unique solid-liquid-solid growth behavior. The two growth modes were classified by the generation site of the nanowires. The grounded-growth mode in which the grown nanowires are generated from the substrate and the branchedgrowth mode where the nanowires are grown from the side of the previously grown nanowires or at the metal catalyst drop attached at the tip of the nanowire stem.

• 새물리
• /
• 제68권11호
• /
• pp.1203-1207
• /
• 2018

본 연구에서는 산소 함유량이 다른 산화 실리콘 막을 사용하여 실리카 나노 와이어를 형성하고, 실리카 나노 와이어의 미세구조 및 물리적 특성을 Si 웨이퍼를 사용하여 형성된 실리카 나노 와이어와 비교 분석하였다. 산화 실리콘 막은 플라즈마 화학 기상 증착 방법을 사용하여 제조하였으며, 실리카 나노 와이어는 산화 실리콘 막 표면에 촉매 물질로 니켈 막을 진공 증착한 후 열처리를 통해 형성하였다. 산소 함유량이 약 50 at.% 이하의 산화 실리콘 막의 경우 나노 와이어 형성 메커니즘, 미세구조 및 물리적 특성 등에서 실리콘 웨이퍼의 경우와 거의 차이점이 없었으며, 특히 나노 와이어의 굵기의 균일성은 산화 실리콘 막에서 더 우수한 거동을 나타내었다. 이러한 결과는 저가로 양질의 실리카 나노 와이어를 제조하는 대체재로서 산화 실리콘 막의 유용성을 제시한다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.407-407
• /
• 2014

Nanotechnology, especially vertically grown silicon nanowires, has gotten great attentions in biology due to characteristics of one dimensional nanostructure; controllable synthetic structure such as lengths, diameters, densities. Silicon nanowires are promising materials as nanoelectrodes due to their highly complementary metal-oxide-semiconductor (CMOS) - and bio-compatibility. Silicon nanowires are so intoxicated that are effective for bio molecular delivery and electrical stimulation. Vertical nanowires with integrated Au tips were fabricated for electrical intracellular interfacing with PC-12 cells. We have made synthesized two types of nanowire devices; one is multi-nanowires electrode for bio molecular sensing and electrical stimulation, and the other is single-nanowires electrode respectively. Here, we demonstrate that differentiation of Nerve Growth Factor (NGF) treated PC-12 cells can be promoted depending on different magnitudes of electrical stimulation and density of Si NWs. It was fabricated by both bottom-up and top-down approaches using low pressure chemical vapor deposition (LPCVD) with high vacuuming environment to electrically stimulate PC-12 cells. The effects of electrical stimulation with NGF on the morphological differentiation are observed by Scanning Electron Microscopy (SEM), and it induces neural outgrowth. Moreover, the cell cytosol can be dyed selectively depending on the degree of differentiation along with fluorescence microscopy measurement. Vertically grown silicon nanowires have further expected advantages in case of single nanowire fabrication, and will be able to expand its characteristics to diverse applications.

• 한국전기전자재료학회논문지
• /
• 제25권2호
• /
• pp.91-95
• /
• 2012

ZnO thin films were deposited on p-type 4H-SiC substrate by pulsed laser deposition. ZnO nanowires were formed on p-type 4H-SiC substrate by furnace. Ti/Au electrodes were deposited on ZnO thin film/SiC and ZnO nanowire/SiC structures, respectively. Structural and crystallographical properties of the fabricated ZnO thin film/SiC and ZnO nanowire/SiC structures were investigated by field emission scanning electron microscope and X-ray diffraction. In this work, resistance and sensitivity of ZnO thin film/SiC gas sensor and ZnO nanowire/SiC gas sensor were measured at $300^{\circ}C$ with various CO gas concentrations (0%, 90%, 70%, and 50%). Resistance of gas sensor decreases at CO gas atmosphere. Sensitivity of ZnO nanowire/SiC gas sensor is twice as big as sensitivity of ZnO thin film/SiC gas sensor.