• Proceedings of the Korean Vacuum Society Conference
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• 2001.07a
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• pp.74-74
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• 2001

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.2
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• pp.117-122
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• 2001

In this paper, we report on photoelectrochemical etching process of 6H-SiC semiconductor wafer. The etching was performed in two-step process; anodization of SiC surface to form a deep porous layer and thermal oxidation followed by an HF dip. Etch rate of about 615${\AA}$/min was obtained during the anodization using a dilute HF(1.4wt% in H$_2$O) electrolyte with the etching potential of 3.0V. The etching rate was increased with the bias voltage. It was also found out that the adition of appropriate portion of H$_2$O$_2$ into the HF solution improves the etching rate. The etching process resulted in a higherly anisotropic etching characteristics and showed to have a potential for the fabrication of SiC devices with a novel design.

• Current Photovoltaic Research
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• v.8 no.3
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• pp.94-101
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• 2020

This study was trying to focus on achieving high efficiency of multi junction solar cell with thin film silicon solar cells. The proposed thin film Si-Ge/c-Si tandem junction solar cell concept with a combination of low-cost thin-film silicon solar cell technology and high-efficiency c-Si cells in a monolithically stacked configuration. The tandem junction solar cells using amorphous silicon germanium (a-SiGe:H) as an absorption layer of upper sub-cell were simulated through ASA (Advanced Semiconductor Analysis) simulator for acquiring the optimum structure. Graded Ge composition - effect of E_g profiling and inserted buffer layer between absorption layer and doped layer showed the improved current density (J_sc) and conversion efficiency (η). 13.11% conversion efficiency of the tandem junction solar cell was observed, which is a result of showing the possibility of thin film Si-Ge/c-Si tandem junction solar cell.

• 한국전자현미경학회:학술대회논문집
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• 2003.11a
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• pp.52-55
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• 2003

• Journal of IKEEE
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• v.25 no.3
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• pp.467-472
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• 2021

Stable operation of semiconductor devices is needed even at high temperatures. Among the structures of semiconductor devices, the area that can cause unstable electrical responses at high temperatures is the contact layer between the metal and the semiconductor. In this study, the effect of annealing conditions included in the process of forming a contact layer of nickel silicide(NiSix) on a p-type SiC layer on the specific contact resistance of the contact layer and the total resistance between the metal and the semiconductor was investigated. To this end, a series of electrodes for TLM (transfer length method) measurements were patterned on the 4 inch p-type SiC layer under conditions of changing annealing temperature of 1700 and 1800 ℃ and annealing time of 30 and 60 minutes. As a result, it was confirmed that the annealing conditions affect the resistance of the contact layer and the electrical stability of the device.

• KIEE International Transactions on Electrophysics and Applications
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• v.3C no.2
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• pp.66-69
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• 2003

Various semiconductor nanowires such as GaN, GaP, InP, Si$_3$N$_4$, SiO$_2$/Si, and SiC were coated conformally with aluminum oxide (Al$_2$O$_3$) layers by atomic layer deposition (ALD) using trimethylaluminum (TMA) and distilled water ($H_2O$) at a temperature of 20$0^{\circ}C$. Transmission electron microscopy (TEM) revealed that A1203 cylindrical shells conformally coat the semiconductor nanowires. This study suggests that the ALD of $Al_2$O$_3$ on nanowires is a promising method for preparing cylindrical dielectric shells for coaxially gated nanowire field-effect transistors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.17-19
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• 2004

The electrical properties of gate oxides grown in two different processes, which are in 10% nitrous oxide($N_2O$) and in dry oxygen, have been experimentally investigated and compared. It has been observed that the $SiC-SiO_2$ interface-trap density(Dit) measured in nitrided gate oxide has been tremendously reduced, compared to the density obtained from gate oxide grown in dry oxygen. The beneficial effects of nitridation on gate oxides also have been demonstrated in the values of total near interface-trap density and of forward-bias breakdown field. The reasons of these improvements have been explained.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.7
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• pp.73-82
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• 1989

We developed a photo-CVD equipment for the deposition of silicon based insulating materials. Silicon dioxide thin films were deposited at various process conditions especially low temperature range $50-250^{\circ}C$. Low pressure mercury lamp was used in the direct excitation of $SiH_4/N_2O$ mixture gas without mercury sensitization. AES and ESCA analysis showed that oxygen to silicon atomic ratio and binding state of Si-O bond was nearly 2.0 and $SiO_2$ type, respectively. The refractive indices were measured to be 1.39-1.44, indicating that films were in relatively low density.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.387-392
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• 2018

Static characteristics of SiC (silicon carbide) lateral p-i-n diodes implemented on semi-insulating substrate without an epitaxial layer are inVestigated. On-axis SiC HPSI (high purity semi-insulating) and VDSI (Vanadium doped semi-insulating) substrates are used to fabricate the lateral p-i-n diode. The space between anode and cathode ($L_{AC}$) is Varied from 5 to $20{\mu}m$ to inVestigate the effect of intrinsic-region length on static characteristics. Maximum breakdown Voltages of HPSI and VDSI are 1117 and 841 V at $L_{AC}=20{\mu}m$, respectiVely. Due to the doped Vanadium ions in VDSI substrate, diffusion length of carriers in the VDSI substrate is less than that of the HPSI substrate. A forward Voltage drop of the diode implemented on VDSI substrate is 12 V at the forward current of $1{\mu}A$, which is higher than 2.5 V of the diode implemented on HPSI substrate.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.43-51
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• 2023

In this paper, we introduce the development trends of power devices which is the key component for power conversion system in electric vehicles, and discuss the characteristics of the next-generation wide-bandgap (WBG) power devices. We provide an overview of the characteristics of the present mainstream Si insulated gate bipolar transistor (IGBT) devices and technology roadmap of Si IGBT by different manufacturers. Next, recent progress and advantages of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) which are the most important unipolar devices, is described compared with conventional Si IGBT. Furthermore, due to the limitations of the current GaN power device technology, the issues encountered in applying the power conversion module for electric vehicles were described.