• 전력전자학회논문지
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• 제27권1호
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• pp.9-17
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• 2022

The series-connected semiconductor devices structure is one way to achieve a high voltage rating. However, a problem with voltage imbalance exists in which different voltages are applied to the series-connected switches. This paper proposed a new voltage balancing technique that controls the turn-off delay time of the switch by adding one bipolar junction transistor to the gate turn-off path. The validity of the proposed method is proved through simulation and experiment. The proposed active gate driver not only enables voltage balancing across a variety of current ranges but also has a greater voltage balancing performance compared with conventional RC snubber methods.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.271-273
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• 2020

SiC 기반의 전력용 반도체 소자들은 스위칭 속도가 빠르고 높은 차단 전압을 가져 dv/dt가 크다. 중전압 이상에서 게이트 드라이버에 절연된 전원 공급을 하기 위해 소형 변압기가 사용된다. 하지만 변압기의 1, 2 차 권선 사이에 수십 pF 이상의 기생 커패시턴스가 존재하며, 높은 전압을 고속으로 스위칭 하게 될 경우 기생 커패시턴스를 통해 제어부로 공통 모드 전류가 흘러 오작동을 야기할 수 있다. 본 연구에서는 변압기를 대체하여 무선전력전송 코일을 이용한 게이트 드라이버용 절연된 전원공급 장치를 제안한다. 무선전력전송 코일 사이의 거리를 수 mm 이상 이격시켜 코일 사이의 기생 커패시턴스를 1 pF 이하로 줄이고 높은 절연 특성을 가질 수 있다. 무선전력 전송의 공진 토폴로지는 직렬-병렬을 선택했고, 2 MHz에서 높은 효율을 갖도록 I-core 코일을 2.2cm × 1.5cm × 1.7cm으로 제작해 검증했다.

• 한국전기전자재료학회논문지
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• 제31권4호
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• pp.198-202
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• 2018

In this work, we have investigated the effect of a 30-min thermal anneal at $550^{\circ}C$ on the electrical characteristics of neutron-irradiated 4H-SiC MOSFETs. Thermal annealing can recover the on/off characteristics of neutron-irradiated 4H-SiC MOSFETs. After thermal annealing, the interface-trap density decreased and the effective mobility increased in terms of the on-characteristics. This finding could be due to the improvement of the interfacial state from thermal annealing and the reduction in Coulomb scattering due to the reduction in interface traps. Additionally, in terms of the off-characteristics, the thermal annealing resulted in the recovery of the breakdown voltage and leakage current. After the thermal annealing, the number of positive trapped charges at the MOSFET interface was decreased.

• 한국전기전자재료학회논문지
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• 제23권6호
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• pp.436-439
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• 2010

SiC power device possesses attractive features, such as high breakdown voltage, high-speed switching capability, and high temperature operation. In general, device design has a significant effect on the switching characteristics. In this work, we report the effect of the interface states ($Q_f$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized by using a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. When the $SiO_2$/SiC interface charge decreases, power losses and switching time also decrease, primarily due to the lowered channel mobilities. High density interface states can result in increased carrier trapping, or more recombination centers or scattering sites. Therefore, the quality of $SiO_2$/SiC interfaces has a important effect on both the static and transient properties of SiC MOSFET devices.

• 진공이야기
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• 제3권3호
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• pp.15-18
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• 2016

In future wearable electronic systems, 3-dimensional (3D) devices have attracted much attention due to their high density integration and low-power functionality. Among 3D devices, gate-all-around (GAA) nanowire transistor provides superior gate controllability, resulting in suppressing short channel effect and other drawbacks in 2D metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon nanowires (SiNWs) are the most promising building block for GAA structure device due to their compatibility with the current Si-based ultra large scale integration (ULSI) technology. Moreover, the theoretical limit for subthreshold swing (SS) of MOSFET is 60 mV/dec at room temperature, which causes the increase in Ioff current. To overcome theoretical limit for the SS, it is crucial that research into new types of device concepts should be performed. In our present studies, we have experimentally demonstrated feedback FET (FBFET) and tunnel FET (TFET) with sub-60 mV/dec based on SiNWs. Also, we fabricated SiNW based complementary TFET (c-TFET) and SiNW complementary metal-oxide-semiconductor (CMOS) inverter. Our research demonstrates the promising potential of SiNW electronic devices for future wearable electronic systems.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.346-349
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• 2002

High Power and high dose ion implantation is essentially needed to make power MOSFET devices based on SiC wafers, because the diffusivities of the impurities such as Al, N, p, B in SiC crystal are very low. In addition, it is needed high temperature annealing for electrical activation of the implanted species. Due to the very high annealing temperature, the surface morphology after electrical activation annealing becomes very rough. We have found the different surface morphologies between implanted and unimplanted region. The unimplanted region showed smoother surface morphology It implies that the damage induced by high energy ion implantation affects the roughening mechanism. Some parts of Si-C bonding are broken in the damaged layer, s\ulcorner the surface migration and sublimation become easy. Therefore the macrostep formation will be promoted. N-type 4H-SiC wafers, which were Al ion implanted at acceleration energy ranged from 30kev to 360kev, were activated at 1600$^{\circ}C$ for 30min. The pre-activation annealing for damage relaxation was performed at 1100-1500$^{\circ}C$ for 30min. The surface morphologies of pre-activation annealed and activation annealed were characterized by atomic force microscopy(AFM).

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.147-148
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• 2018

본 논문에서는 SiC를 이용한 신재생 에너지용 다중입력 PCS를 개발하였다. 제안하는 PCS는 풍력, 태양광, 배터리를 포함하는 다중입력 구조를 갖고 2단 방식으로 비절연 DC-DC 컨버터가 전압, 전류 및 양방향 제어를 하고 DC-AC 인버터가 단상 계통연계, 독립운전을 지원한다. 또한 SiC Mosfet을 사용하여 수동소자 크기를 최소화 하고 고효율 동작을 달성하였다. 제안하는 PCS의 동작모드를 제시하고 시작품을 통해 본 논문의 타당성을 검증하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.288-291
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• 2002

Application of metal silicides such as TiSi$_2$ and CoSi$_2$ as contacts and gate electrodes are being studied. However, TiSi$_2$ due to the linewidth-dependance, and CoSi$_2$ due to the excessive Si consumption during silicidation cannot be applied to the deep-submicron MOSFET device. NiSi shows no such problems and can be formed at the low temperature. But, NiSi shows thermal instability. In this investigation, NiSi was formed with a Ti-capping layer to improve the thermal stability. Ni and Ti films were deposited by the thermal evaporator. The samples were then annealed in the N$_2$ ambient at 300-800$^{\circ}C$ in a RTA (rapid thermal annealing) system. Four point probe, FESEM, and AES were used to study the thermal properties of Ti-capped NiSi layers. The Ti-capped NiSi was stable up to 700$^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after 600$^{\circ}C$. The AES results revealed that the Ni diffusion further into the Si substrate was retarded by the capping layer, resulting in the suppression of agglomeration of NiSi films.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권2호
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• pp.106-113
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• 2006

Electrical properties of $Si_{0.88}Ge_{0.12}(C)$ p-MOSFETs have been exploited in an effort to investigate $Si_{0.88}Ge_{0.12}(C)$ channel structures designed especially to suppress diffusion of dopants during epitaxial growth and subsequent fabrication processes. The incorporation of 0.1 percent of carbon in $Si_{0.88}Ge_{0.12}$ channel layer could accomodate stress due to lattice mismatch and adjust bandgap energy slightly, but resulted in deteriorated current-voltage properties in a broad range of operation conditions with depressed gain, high subthreshold current level and many weak breakdown electric field in gateoxide. $Si_{0.88}Ge_{0.12}(C)$ channel structures with boron delta-doping represented increased conductance and feasible use of modulation doped device of $Si_{0.88}Ge_{0.12}(C)$ heterostructures.

• 반도체디스플레이기술학회지
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• 제21권2호
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• pp.101-106
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• 2022

In this paper, WBG semiconductor such as SiC and GaN were applied as power switches for LCL circuit that can be applied to satellite power systems and the test results of the LCL circuit are reported. P-channel MOSFET and N-channel MOSFET, which were generally used in the conventional LCL circuit, were applied together to expand the utility of the test results. The design and stability evaluation were performed using a Micro Cap circuit simulation program. For the test circuit, a module using each switch was manufactured, and a total of 5 modules were manufactured and the steady state and transient state characteristics were compared. From the experimental results, the LCL circuit for power supply of the satellite power system constructed in this paper satisfied the constant current and constant voltage conditions under various operating conditions. The P-channel MOSFET showed the lowest efficiency characteristics, and the three N-channel switches of Si, SiC and GaN showed relatively high efficiency characteristics of up to 99.05% or more. In conclusion, it was verified that the on-resistor of the switch had a direct effect on the efficiency and loss characteristics.