• Title/Summary/Keyword: Semiconductor wafer

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Design and Analysis of a Receiver-Transmitter Optical System for a Displacement-Measuring Laser Interferometer (위치변위 레이저 간섭계용 송수신 광학계의 설계 및 분석)

  • Yun, Seok-Jae;Rim, Cheon-Seog
    • Korean Journal of Optics and Photonics
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    • v.28 no.2
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    • pp.75-82
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    • 2017
  • We present a new type of receiver-transmitter optical system that can be adapted to the sensor head of a displacement-measuring interferometer. The interferometer is utilized to control positioning error and repetition accuracy of a wafer, down to the order of 1 nm, in a semiconductor manufacturing process. Currently, according to the tendency of scale-up of wafers, an interferometer is demanded to measure a wider range of displacement. To solve this technical problem, we suggest a new type of receiver-transmitter optical system consisting of a GRIN lens-Collimating lens-Afocal lens system, compared to conventional receiver-transmitter using a single collimating lens. By adapting this new technological optical structure, we can improve coupling efficiency up to about 100 times that of a single conventional collimating lens.

Highly Manufacturable 65nm McFET (Multi-channel Field Effect Transistor) SRAM Cell with Extremely High Performance

  • Kim, Sung-Min;Yoon, Eun-Jung;Kim, Min-Sang;Li, Ming;Oh, Chang-Woo;Lee, Sung-Young;Yeo, Kyoung-Hwan;Kim, Sung-Hwan;Choe, Dong-Uk;Suk, Sung-Dae;Kim, Dong-Won;Park, Dong-Gun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.1
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    • pp.22-29
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    • 2006
  • We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

Plasma etching behavior of RE-Si-Al-O glass (RE: Y, La, Gd)

  • Lee, Jeong-Gi;Hwang, Seong-Jin;Lee, Seong-Min;Kim, Hyeong-Sun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.49.1-49.1
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    • 2010
  • The particle generation during the plasma enhanced process is highly considered as serious problem in the semiconductor manufacturing industry. The material for the plasma processing chamber requires the plasma etching characteristics which are homogeneously etched surface and low plasma etching depth for preventing particulate contamination and high durability. We found that the materials without grain boundaries can prevent the particle generation. Therefore, the amorphous material with the low plasma etching rate may be the best candidate for the plasma processing chamber instead of the polycrystalline materials such as yttria and alumina. Three glasses based on $SiO_2$ and $Al_2O_3$ were prepared with various rare-earth elements (Gd, Y and La) which are same content in the glass. The glasses were plasma etched in the same condition and their plasma etching rate was compared including reference materials such as Si-wafer, quartz, yttria and alumina. The mechanical and thermal properties of the glasses were highly related with cationic field strength (CFS) of the rare-earth elements. We assumed that the plasma etching resistance may highly contributed by the thermal properties of the fluorine byproducts generated during the plasma exposure and it is expected that the Gd containing glass may have the highest plasma etching resistance due to the highest sublimation temperature of $GdF_3$ among three rare-earth elements (Gd, Y and La). However, it is found that the plasma etching results is highly related with the mechanical property of the glasses which indicates the cationic field strength. From the result, we conclude that the glass structure should be analyzed and the plasma etching test should be conducted with different condition in the future to understand the plasma etching behavior of the glasses perfectly.

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A Study on Si-wafer Cleaning by Electrolyzed Water (전리수를 이용한 실리콘 웨이퍼 세정)

  • Yun, Hyo-Seop;Ryu, Geun-Geol
    • Korean Journal of Materials Research
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    • v.11 no.4
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    • pp.251-257
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    • 2001
  • A present semiconductor cleaning technology is based upon RCA cleaning, high temperature process which consumes vast chemicals and ultra Pure water(UPW). This technology gives rise to the many environmental issues, therefore some alternatives have been studied. In this study, intentionally contaminated Si wafers were cleaned using the electrolyzed water(EW). The EW was generated by an electrolysis equipment which was composed of anode. cathode, and toddle chambers. Oxidative water and reductive water were obtained in anode and cathode chambers, respectively. In case $NH_4$Cl electrolyte, the oxidation-reduction potential(ORP) and pH for anode water(AW) and cathode water(CW) were measured to be +1050mV and 4.7, and -750mV and 9.8, respectively. For cleaning metallic impurities, AW was confirmed to be more effective than that of CW, and the particle distribution after various particle removal processes was shown to be same distribution.

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A Study on Point Defect Induced with Neutron Irradiation (중성자 조사에 의해 생성된 점결함 연구)

  • 김진현;이운섭;류근걸;김봉구;이병철;박상준
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.3 no.3
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    • pp.165-169
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    • 2002
  • Silicon wafer is very important accuracy make use semiconductor device substrate. In this research, for the uniformity dopant density distribution obtained to Neutron Transmutation Doping on make use Si in P Doping study work. In this research. we irradiated neutron on FZ silicon wafers which had high resistivity (1000~2000 ${\Omega}$cm), HANARO reactor was utilized resistivity changes due to observed, the generation of neutron irradiation on point defect analyzed, point defect on resistivity changes inquire into the effect. Before neutron irradiation theoretical due to calculated 5 ${\Omega}$-cm, 20.1 ${\Omega}$-cm for HTS hole and 5 ${\Omega}$-cm, 26.5 ${\Omega}$-cm, 32.5 ${\Omega}$-cm for IP3 hole. After neutron irradiation through SRP measurement the designed resistivities were approached, which were 2.1 H-cm for HTS-1, 7.21 ${\Omega}$-cm for HTS-2, 1.79 ${\Omega}$-cm for IP-1, 6.83 ${\Omega}$-cm for IP-2, 9.23 ${\Omega}$-cm for IP-3, respectively. Also after neutron irradiation resistivity changes due to thermal neutron dependent irradiation hole types free.

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Spray 방법을 이용한 결정질 태양전지 Emitter 확산의 최적화 연구

  • Song, Gyu-Wan;Jang, Ju-Yeon;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.406-406
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    • 2011
  • 결정질 태양전지에서 도핑(Doping)은 반도체(Semiconductor)의 PN 접합(Junction)을 형성하는 중요한 역할을 한다. 도핑은 반도체에 불순물(Dopant)을 주입하는 공정으로 고온에서 진행되며 온도는 중요한 변수(Parameter)로 작용한다. 본 연구에서는 여러 가지 에미터(emitter)층 형성방법 중에 가장 저가이면서 공정과정이 간단하며 대면적 도핑이 용의한 Spray 방법을 통해 효과적인 에미터 층 형성의 최적화를 위해 DI water에 각각 1%, 3%, 5% 7%로 희석된 H3PO4용액 으로 850$^{\circ}C$에서 열처리 시간을 가변해 가며 최적화된 면저항과 표면농도 특성을 분석하였다. 도핑소스가 웨이퍼(wafer) 각각의 표면에 흡착시킨 후 오븐에 넣어 150$^{\circ}C$에서 5분간 건조시킨 후 퍼니스(furance)에 넣어 시간을 가변해 가며 도핑시켰다. Spray 방식은 기존의 방식보다 저렴하고 In-line 공정에 적합하며 대용량으로 전환이 쉽다는 많은 장점을 가지고 있다. 도핑시 먼저 spray를 이용하여 웨이퍼 표면에 균일하게 용액을 흡착시킨 후 오븐에서 150$^{\circ}C$에서 5분간 건조 후 furnace에 넣어 850$^{\circ}C$에서 시간을 가변 해가며 실험하였다. H3PO4용액의 비율이 1%일 때는 2분 이상 열처리를 하였을 때 60${\Omega}/{\Box}$ 이하로 내려가지 않았다. 이는 최초 표면농도가 낮아 더 이상 확산되지 않음을 의미한다. 또한 H3PO4의 비율이 3% 이상일 때는 열처리 시간이 1분 이하일 때 면저항의 변화가 거의 없었으나 2분 이상일 때는 시간에 따라서 점차 낮아졌으며 균일도 역시 좋아졌다. 이는 H3PO4의 비율이 3% 이상일 때는 표면농도가 높아서 1분 이하의 열처리 시간에서는 확산해 들어가는 양이 거의 같음을 알 수 있었다.

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A Preliminary Research on Optical In-Situ Monitoring of RF Plasma Induced Ion Current Using Optical Plasma Monitoring System (OPMS)

  • Kim, Hye-Jeong;Lee, Jun-Yong;Chun, Sang-Hyun;Hong, Sang-Jeen
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.523-523
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    • 2012
  • As the wafer geometric requirements continuously complicated and minutes in tens of nanometers, the expectation of real-time add-on sensors for in-situ plasma process monitoring is rapidly increasing. Various industry applications, utilizing plasma impedance monitor (PIM) and optical emission spectroscopy (OES), on etch end point detection, etch chemistry investigation, health monitoring, fault detection and classification, and advanced process control are good examples. However, process monitoring in semiconductor manufacturing industry requires non-invasiveness. The hypothesis behind the optical monitoring of plasma induced ion current is for the monitoring of plasma induced charging damage in non-invasive optical way. In plasma dielectric via etching, the bombardment of reactive ions on exposed conductor patterns may induce electrical current. Induced electrical charge can further flow down to device level, and accumulated charges in the consecutive plasma processes during back-end metallization can create plasma induced charging damage to shift the threshold voltage of device. As a preliminary research for the hypothesis, we performed two phases experiment to measure the plasma induced current in etch environmental condition. We fabricated electrical test circuits to convert induced current to flickering frequency of LED output, and the flickering frequency was measured by high speed optical plasma monitoring system (OPMS) in 10 kHz. Current-frequency calibration was done in offline by applying stepwise current increase while LED flickering was measured. Once the performance of the test circuits was evaluated, a metal pad for collecting ion bombardment during plasma etch condition was placed inside etch chamber, and the LED output frequency was measured in real-time. It was successful to acquire high speed optical emission data acquisition in 10 kHz. Offline measurement with the test circuitry was satisfactory, and we are continuously investigating the potential of real-time in-situ plasma induce current measurement via OPMS.

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Electron Trapping and Transport in Poly(tetraphenyl)silole Siloxane of Quantum Well Structure

  • Choi, Jin-Kyu;Jang, Seung-Hyun;Kim, Ki-Jeong;Sohn, Hong-Lae;Jeong, Hyun-Dam
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.158-158
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    • 2012
  • A new kind of organic-inorganic hybrid polymer, poly(tetraphenyl)silole siloxane (PSS), was invented and synthesized for realization of its unique charge trap properties. The organic portions consisting of (tetraphenyl)silole rings are responsible for electron trapping owing to their low-lying LUMO, while the Si-O-Si inorganic linkages of high HOMO-LUMO gap provide the intrachain energy barrier for controlling electron transport. Such an alternation of the organic and inorganic moieties in a polymer may give an interesting quantum well electronic structure in a molecule. The PSS thin film was fabricated by spin-coating of the PSS solution in THF organic solvent onto Si-wafer substrates and curing. The electron trapping of the PSS thin films was confirmed by the capacitance-voltage (C-V) measurements performed within the metal-insulator-semiconductor (MIS) device structure. And the quantum well electronic structure of the PSS thin film, which was thought to be the origin of the electron trapping, was investigated by a combination of theoretical and experimental methods: density functional theory (DFT) calculations in Gaussian03 package and spectroscopic techniques such as near edge X-ray absorption fine structure spectroscopy (NEXAFS) and photoemission spectroscopy (PES). The electron trapping properties of the PSS thin film of quantum well structure are closely related to intra- and inter-polymer chain electron transports. Among them, the intra-chain electron transport was theoretically studied using the Atomistix Toolkit (ATK) software based on the non-equilibrium Green's function (NEGF) method in conjunction with the DFT.

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Electrodeposition for the Fabrication of Copper Interconnection in Semiconductor Devices (반도체 소자용 구리 배선 형성을 위한 전해 도금)

  • Kim, Myung Jun;Kim, Jae Jeong
    • Korean Chemical Engineering Research
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    • v.52 no.1
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    • pp.26-39
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    • 2014
  • Cu interconnection in electronic devices is fabricated via damascene process including Cu electrodeposition. In this review, Cu electrodeposition and superfilling for fabricating Cu interconnection are introduced. Superfilling results from the influences of organic additives in the electrolyte for Cu electrodeposition, and this is enabled by the local enhancement of Cu electrodeposition at the bottom of filling feature formed on the wafer through manipulating the surface coverage of organic additives. The dimension of metal interconnection has been constantly reduced to increase the integrity of electronic devices, and the width of interconnection reaches the range of few tens of nanometer. This size reduction raises the issues, which are the deterioration of electrical property and the reliability of Cu interconnection, and the difficulty of Cu superfilling. The various researches on the development of organic additives for the modification of Cu microstructure, the application of pulse and pulse-reverse electrodeposition, Cu-based alloy superfilling for improvement of reliability, and the enhancement of superfilling phenomenon to overcome the current problems are addressed in this review.

Properties of Silicon Nitride Deposited by RF-PECVD for C-Si solar cell (결정질 실리콘 태양전지를 위한 실리콘 질화막의 특성)

  • Park, Je-Jun;Kim, Jin-Kuk;Song, Hee-Eun;Kang, Min-Gu;Kang, Gi-Hwan;Lee, Hi-Deok
    • Journal of the Korean Solar Energy Society
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    • v.33 no.2
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    • pp.11-17
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    • 2013
  • Silicon nitride($SiN_x:H$) deposited by radio frequency plasma enhanced chemical vapor deposition(RF-PECVD) is commonly used for anti-reflection coating and passivation in crystalline silicon solar cell fabrication. In this paper, characteristics of the deposited silicon nitride was studied with change of working pressure, deposition temperature, gas ratio of $NH_3$ and $SiH_4$, and RF power during deposition. The deposition rate, refractive index and effective lifetime were analyzed. The (100) p-type silicon wafers with one-side polished, $660-690{\mu}m$, and resistivity $1-10{\Omega}{\cdot}cm$ were used. As a result, when the working pressure increased, the deposition rate of SiNx was increased while the effective life time for the $SiN_x$-deposited wafer was decreased. The result regarding deposition temperature, gas ratio and RF power changes would be explained in detail below. In this paper, the optimized condition in silicon nitride deposition for silicon solar cell was obtained as 1.0 Torr for the working pressure, $400^{\circ}C$ for deposition temperature, 500 W for RF power and 0.88 for $NH_3/SiH_4$ gas ratio. The silicon nitride layer deposited in this condition showed the effective life time of > $1400{\mu}s$ and the surface recombination rate of 25 cm/s. The crystalline silicon solar cell fabricated with this SiNx coating showed 18.1% conversion efficiency.