• 제목/요약/키워드: Semiconductor reliability

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Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics

  • Kim, Yong-Bin
    • Transactions on Electrical and Electronic Materials
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    • 제11권3호
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    • pp.93-105
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    • 2010
  • Complementary metal-oxide-semiconductor (CMOS) technology scaling has been a main key for continuous progress in silicon-based semiconductor industry over the past three decades. However, as the technology scaling enters nanometer regime, CMOS devices are facing many serious problems such as increased leakage currents, difficulty on increase of on-current, large parameter variations, low reliability and yield, increase in manufacturing cost, and etc. To sustain the historical improvements, various innovations in CMOS materials and device structures have been researched and introduced. In parallel with those researches, various new nanoelectronic devices, so called "Beyond CMOS Devices," are actively being investigated and researched to supplement or possibly replace ultimately scaled conventional CMOS devices. While those nanoelectronic devices offer ultra-high density system integration, they are still in a premature stage having many critical issues such as high variations and deteriorated reliability. The practical realization of those promising technologies requires extensive researches from device to system architecture level. In this paper, the current researches and challenges on nanoelectronics are reviewed and critical tasks are summarized from device level to circuit design/CAD domain to better prepare for the forthcoming technologies.

Short Channel Analytical Model for High Electron Mobility Transistor to Obtain Higher Cut-Off Frequency Maintaining the Reliability of the Device

  • Gupta, Ritesh;Aggarwal, Sandeep Kumar;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권2호
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    • pp.120-131
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    • 2007
  • A comprehensive short channel analytical model has been proposed for High Electron Mobility Transistor (HEMT) to obtain higher cut-off frequency maintaining the reliability of the device. The model has been proposed to consider generalized doping variation in the directions perpendicular to and along the channel. The effect of field plates and different gate-insulator geometry (T-gate, etc) have been considered by dividing the area between gate and the high band gap semiconductor into different regions along the channel having different insulator and metal combinations of different thicknesses and work function with the possibility that metal is in direct contact with the high band gap semiconductor. The variation obtained by gate-insulator geometry and field plates in the field and channel potential can be produced by varying doping concentration, metal work-function and gate-stack structures along the channel. The results so obtained for normal device structure have been compared with previous proposed model and numerical method (finite difference method) to prove the validity of the model.

점하중시험법에 의한 반도체 기판용 실리콘 웨이퍼의 파괴강도 평가 (Evaluation of Fracture Strength of Silicon Wafer for Semiconductor Substrate by Point Load Test Method)

  • 이승미;변재원
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제16권1호
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    • pp.26-31
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    • 2016
  • Purpose: The purpose of this study was to investigate the effect of grinding process and thickness on the fracture strength of silicon die used for semiconductor substrate. Method: Silicon wafers with different thickness from $200{\mu}m$ to $50{\mu}m$ were prepared by chemical mechanical polishing (CMP) and dicing before grinding (DBG) process, respectively. Fracture load was measured by point load test for 50 silicon dies per each wafer. Results: Fracture strength at the center area was lower than that at the edge area of the wafer fabricated by DBG process, while random distribution of the fracture strength was observed for the CMPed wafer. Average fracture strength of DBGed specimens was higher than that of the CMPed ones for the same thickness of wafer. Conclusion: DBG process can be more helpful for lowering fracture probability during the semiconductor fabrication process than CMP process.

3D TCAD Analysis of Hot-Carrier Degradation Mechanisms in 10 nm Node Input/Output Bulk FinFETs

  • Son, Dokyun;Jeon, Sangbin;Kang, Myounggon;Shin, Hyungcheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.191-197
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    • 2016
  • In this paper, we investigated the hotcarrier injection (HCI) mechanism, one of the most important reliability issues, in 10 nm node Input/Output (I/O) bulk FinFET. The FinFET has much intensive HCI damage in Fin-bottom region, while the HCI damage for planar device has relatively uniform behavior. The local damage behavior in the FinFET is due to the geometrical characteristics. Also, the HCI is significantly affected by doping profile, which could change the worst HCI bias condition. This work suggested comprehensive understanding of HCI mechanisms and the guideline of doping profile in 10 nm node I/O bulk FinFET.

반도체 장비의 원격 모니터링을 위한 임베디드 웹 서버 (An Embedded Web Server for Remote Monitoring the Semiconductor Equipment)

  • 윤한경;임성락
    • 반도체디스플레이기술학회지
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    • 제2권3호
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    • pp.13-18
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    • 2003
  • A remote monitoring system of the semiconductor equipment is used to monitor or control operations of the equipment. Most of the conventional monitoring systems are based on the client-server model with the general purpose PC. Basically, it implies the difficulties in the system reliability and cost down due to its size and complexity. To overcome these difficulties, we suggest an embedded web server which is based on the low-cost microprocessor. It is designed for the monitoring or controlling a dedicated equipment only. To evaluate the feasibility of the suggested embedded web server, we have implemented a test-board with ATMega103 and programmed the basic modules using the AVR-GCC. Finally, we have tested its operations on the MS Explorer 6.0 environment.

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전력케이블용 XLPE/반도전층의 유전 특성 (Dielectric Properties of XLPE/Semiconductor Sheet in Power Cables)

  • 이관우;이경용;최용성;박대희
    • 한국전기전자재료학회논문지
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    • 제17권8호
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    • pp.904-909
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    • 2004
  • We studied the dielectric properties and voltage dependence on slice XLPE sheet from 22 kV and 154 kV power cables. Interface structures are XLPE/semiconductor and XLPE/water/semiconductor capacitance and tan6 of 22 kV, 154 kV were 52/42 pF and $7.4\times{10}/^{-4}, 2.15\times{10}^{-4}$, respectively in these results, the trend was increased with the increase of temperature the tan$\delta$ of XLPE/semiconductive layer and XLPE/water/ semiconductive layer were increased as compared with that of XLPE Temperature reliability of tan$\delta$ was small.

반도체 제조 트랙장비의 온라인 스케줄링 방법 (On-Line Scheduling Method for Track Systems in Semiconductor Fabrication)

  • 윤현중;이두용
    • 대한기계학회논문집A
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    • 제25권3호
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    • pp.443-451
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    • 2001
  • This paper addresses an on-line scheduling method for track systems in semiconductor fabrication. A track system is a clustered equipment performing photolithography process in semiconductor fabrication. Trends toward high automation and flexibility in the track systems accelerate the necessity of the intelligent controller that can guarantee reliability and optimize productivity of the track systems. This paper proposes an-efficient on-line scheduling method that can avoid deadlock inherent to track systems and optimize the productivity. We employ two procedures for the on-line scheduling. First, we define potential deadlock set to apply deadlock avoidance policy efficiently. After introducing the potential deadlock set, we propose a deadlock avoidance policy using an on-line Gantt chart, which can generate optimal near-optimal schedule without deadlock. The proposed on-line scheduling method is shown to be efficient in handling deadlock inherent to the track systems through simulation.

준 경험기법을 이용한 고집적 반도체공장의 미진동 제어를 위한 구조물의 동적설계에 관한 연구 (A Study on the Structural Dynamic Design for Sub-micro Vibration Control in High Class Semiconductor Factor by Semi-Empirical Method)

  • 이홍기;백재호;원영재;박해동;김두훈
    • 소음진동
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    • 제9권6호
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    • pp.1227-1233
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    • 1999
  • Modern technology depends on the reliability of extremely high technology equipments. In the production of semiconductor wafer, optical and electron microscopes, ion-beam, laser device must maintain their alignments within a nanometer. This equipment requires a vibration free environment to provide its proper function. Especially, lithography and inspection devices, which have sub-nanometer class high accuracy and resolution, have come to necessity for producing more improved giga and tera class semiconductor wafers. This high technology equipments require very strict environmental vibration standard, vibration criteria, in proportion to the accuracy of the manufacturing, inspecting devices. This paper deals with the structural dynamic design in high class semiconductor factory in order to be satisfied more strict vibration criteria for high sensitive equipment.

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다기능 복합관절 연속수동운동 의료기기 설계 (Design of Multifunctional Compound Joint Medical Equipment for Continuous Passive Motion)

  • 이강원;양오;이창호
    • 반도체디스플레이기술학회지
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    • 제21권4호
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    • pp.126-131
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    • 2022
  • The number of joint disease patients is increasing every year. Currently, the most CPM(Continuous Passive Motion) equipment uses expensive imported equipment, and one CPM equipment is designed to be used only in one joint, medical personnel or hospitals who are the main users of the medical equipment need to have several types of CPMs for joint rehabilitation. To solve this problem, this paper designed a multifunctional joint medical equipment that enables rehabilitation of knee, shoulder, and elbow joints in one CPM equipment and includes general, intensive, and adaptive exercise functions for effective treatment according to the patient's condition. The patient's condition was diagnosed using a load cell and a current sensor. In this paper, effective rehabilitation methods were presented and high reliability and precision of medical equipment was confirmed through experiments using potentiometer, encoder, and PI controller.

유기 발광 다이오드 소자의 성능·수명 평가를 위한 순환 계측 시스템 (Cyclic Measurement System for Evaluating Organic Light Emitting Diode Devices)

  • 박일후;나인엽;주현필;김규태
    • 반도체디스플레이기술학회지
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    • 제17권1호
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    • pp.50-53
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    • 2018
  • Cyclic measurement system using relay circuit for organic light emitting diode (OLED) was demonstrated. The OLED characterization such as current-voltage, impedance, and capacitance-voltage is performed in sequence, repetitively and automatically under full control of the personnel computer (PC) without changing the connection of cables. Owing to in situ degradation by cyclic measurement, the time dependence of the data can give good information on the reliability factor of the OLED devices. Therefore, both performance and reliability of the OLEDs can be evaluated, with no manual operation during the entire process.