• 제목/요약/키워드: Semiconductor metal oxide

검색결과 713건 처리시간 0.027초

Graphene field-effect transistor for radio-frequency applications : review

  • Moon, Jeong-Sun
    • Carbon letters
    • /
    • 제13권1호
    • /
    • pp.17-22
    • /
    • 2012
  • Currently, graphene is a topic of very active research in fields from science to potential applications. For various radio-frequency (RF) circuit applications including low-noise amplifiers, the unique ambipolar nature of graphene field-effect transistors can be utilized for high-performance frequency multipliers, mixers and high-speed radiometers. Potential integration of graphene on Silicon substrates with complementary metal-oxide-semiconductor compatibility would also benefit future RF systems. The future success of the RF circuit applications depends on vertical and lateral scaling of graphene metal-oxide-semiconductor field-effect transistors to minimize parasitics and improve gate modulation efficiency in the channel. In this paper, we highlight recent progress in graphene materials, devices, and circuits for RF applications. For passive RF applications, we show its transparent electromagnetic shielding in Ku-band and transparent antenna, where its success depends on quality of materials. We also attempt to discuss future applications and challenges of graphene.

CMOS binary image sensor with high-sensitivity metal-oxide semiconductor field-effect transistor-type photodetector for high-speed imaging

  • Jang, Juneyoung;Heo, Wonbin;Kong, Jaesung;Kim, Young-Mo;Shin, Jang-Kyoo
    • 센서학회지
    • /
    • 제30권5호
    • /
    • pp.295-299
    • /
    • 2021
  • In this study, we present a complementary metal-oxide-semiconductor (CMOS) binary image sensor. It can shoot an object rotating at a high-speed by using a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector. The GBT PMOSFET-type photodetector amplifies the photocurrent generated by light. Therefore, it is more sensitive than a standard N+/P-substrate photodetector. A binary operation is installed in a GBT PMOSFET-type photodetector with high-sensitivity characteristics, and the high-speed operation is verified by the output image. The binary operations circuit comprise a comparator and memory of 1- bit. Thus, the binary CMOS image sensor does not require an additional analog-to-digital converter. The binary CMOS image sensor is manufactured using a standard CMOS process, and its high- speed operation is verified experimentally.

반도체 가공 작업환경에서 부산물로 발생되는 주요 금속산화물의 입자 크기, 형상, 결정구조에 따른 독성 고찰 (Size, Shape, and Crystal Structure-dependent Toxicity of Major Metal Oxide Particles Generated as Byproducts in Semiconductor Fabrication Facility)

  • 최광민
    • 한국산업보건학회지
    • /
    • 제26권2호
    • /
    • pp.119-138
    • /
    • 2016
  • Objectives: The purpose of this study is to review size, shape, and crystal structure-dependent toxicity of major metal oxide particles such as silicon dioxide, tungsten trioxide, aluminum oxide, and titanium dioxide as byproducts generated in semiconductor fabrication facility. Methods: To review the toxicity of major metal oxide particles, we used various reported research and review papers. The papers were searched by using websites such as Google Scholar and PubMed. Keyword search terms included '$SiO_2$(or $WO_3$ or $Al_2O_3$ or $TiO_2$) toxicity', 'health effects $SiO_2$(or $WO_3$ or $Al_2O_3$ or $TiO_2$). Additional papers were identified in references cited in the searched papers. Results: In various cell lines and organs of human and animals, cytotoxicity, genotoxicity, hepatoxicity, fetotoxicity, neurotoxicity, and histopathological changes were induced by silicon dioxide, tungsten trioxide, aluminium oxide, and titanium dioxide particles. Differences in toxicity were dependent on the cell lines, organs, doses, as well as the chemical composition, size, surface area, shape, and crystal structure of the particles. However, the doses used in the reported papers were higher than the possible exposure level in general work environment. Oxidative stress induced by the metal oxide particles plays a significant role in the expression of toxicity. Conclusions: The results cannot guarantee human toxicity of the metal oxide particles, because there is still a lack of available information about health effects on humans. In addition, toxicological studies under the exposure conditions in the actual work environment are needed.

Comparative investigation of endurance and bias temperature instability characteristics in metal-Al2O3-nitride-oxide-semiconductor (MANOS) and semiconductor-oxide-nitride-oxide-semiconductor (SONOS) charge trap flash memory

  • Kim, Dae Hwan;Park, Sungwook;Seo, Yujeong;Kim, Tae Geun;Kim, Dong Myong;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제12권4호
    • /
    • pp.449-457
    • /
    • 2012
  • The program/erase (P/E) cyclic endurances including bias temperature instability (BTI) behaviors of Metal-$Al_2O_3$-Nitride-Oxide-Semiconductor (MANOS) memories are investigated in comparison with those of Semiconductor-Oxide-Nitride-Oxide-Semiconductor (SONOS) memories. In terms of BTI behaviors, the SONOS power-law exponent n is ~0.3 independent of the P/E cycle and the temperature in the case of programmed cell, and 0.36~0.66 sensitive to the temperature in case of erased cell. Physical mechanisms are observed with thermally activated $h^*$ diffusion-induced Si/$SiO_2$ interface trap ($N_{IT}$) curing and Poole-Frenkel emission of holes trapped in border trap in the bottom oxide ($N_{OT}$). In terms of the BTI behavior in MANOS memory cells, the power-law exponent is n=0.4~0.9 in the programmed cell and n=0.65~1.2 in the erased cell, which means that the power law is strong function of the number of P/E cycles, not of the temperature. Related mechanism is can be explained by the competition between the cycle-induced degradation of P/E efficiency and the temperature-controlled $h^*$ diffusion followed by $N_{IT}$ passivation.

Facilitation of the four-mask process by the double-layered Ti/Si barrier metal for oxide semiconductor TFTs

  • Hino, Aya;Maeda, Takeaki;Morita, Shinya;Kugimiya, Toshihiro
    • Journal of Information Display
    • /
    • 제13권2호
    • /
    • pp.61-66
    • /
    • 2012
  • The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at $350^{\circ}C$. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used.

Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2

  • Jo, Yoo Jin;Moon, Jeong Hyun;Seok, Ogyun;Bahng, Wook;Park, Tae Joo;Ha, Min-Woo
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제17권2호
    • /
    • pp.265-270
    • /
    • 2017
  • 4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.

ONO Ruptures Caused by ONO Implantation in a SONOS Non-Volatile Memory Device

  • Kim, Sang-Yong;Kim, Il-Soo
    • Transactions on Electrical and Electronic Materials
    • /
    • 제12권1호
    • /
    • pp.16-19
    • /
    • 2011
  • The oxide-nitride-oxide (ONO) deposition process was added to the beginning of a 0.25 ${\mu}m$ embedded polysiliconoxide-nitride-oxide-silicon (SONOS) process before all of the logic well implantation processes in order to maintain the characteristics of basic CMOS(complementary metal-oxide semiconductor) logic technology. The system subsequently suffered severe ONO rupture failure. The damage was caused by the ONO implantation and was responsible for the ONO rupture failure in the embedded SONOS process. Furthermore, based on the experimental results as well as an implanted ion's energy loss model, processes primarily producing permanent displacement damages responsible for the ONO rupture failure were investigated for the embedded SONOS process.

Deformation of the AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistor characteristics by UV irradiation

  • Lim, Jin Hong;Kim, Jeong Jin;Yang, Jeon Wook
    • 전기전자학회논문지
    • /
    • 제17권4호
    • /
    • pp.531-536
    • /
    • 2013
  • The impact of UV irradiation process on the AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistor was investigated. Due to the high intensity UV irradiation before the gate dielectric deposition, the conductivity of AlGaN/GaN structure and the drain saturation current of the transistor increased by about 10 %. However, the pinch off characteristics of transistor was severely deformed by the process. By comparing the electrical characteristics of the transistors, it was proposed that the high intensity UV irradiation formed a sub-channel under the two dimensional electron gas of AlGaN/GaN structure even without additional impurity injection.

High-performance thin-film transistor with a novel metal oxide channel layer

  • Son, Dae-Ho;Kim, Dae-Hwan;Kim, Jung-Hye;Sung, Shi-Joon;Jung, Eun-Ae;Kang, Jin-Kyu
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
    • /
    • pp.222-222
    • /
    • 2010
  • Transparent semiconductor oxide thin films have been attracting considerable attention as potential channel layers in thin film transistors (TFTs) owing to their several advantageous electrical and optical characteristics such as high mobility, high stability, and transparency. TFTs with ZnO or similar metal oxide semiconductor thin films as the active layer have already been developed for use in active matrix organic light emitting diode (AMOLED). Of late, there have been several reports on TFTs fabricated with InZnO, AlZnSnO, InGaZnO, or other metal oxide semiconductor thin films as the active channel layer. These newly developed TFTs were expected to have better electrical characteristics than ZnO TFTs. In fact, results of these investigations have shown that TFTs with the new multi-component material have excellent electrical properties. In this work, we present TFTs with inverted coplanar geometry and with a novel HfInZnO active layer co-sputtered at room temperature. These TFTs are meant for use in low voltage, battery-operated mobile and flexible devices. Overall, the TFTs showed good performance: the low sub-threshold swing was low and the $I_{on/off}$ ratio was high.

  • PDF

저온공정 n-InGaAs Schottky 접합의 구조적 특성 (Structural Analysis of Low Temperature Processed Schottky Contacts to n-InGaAs)

  • 이홍주
    • 한국전기전자재료학회논문지
    • /
    • 제14권7호
    • /
    • pp.533-538
    • /
    • 2001
  • The barrier height is found to increase from 0.25 to 0.690 eV for Schottky contacts on n-InGaAs using deposition of Ag on a substrate cooled to 77K(LT). Surface analysis leads to an interface model for the LT diode in which there are oxide compounds of In:O and As:O between the metal and semiconductor, leading to behavior as a metal-insulator-semiconductor diode. The metal film deposited t LT has a finer and more uniform structure, as revealed by scanning electron microscopy and in situ metal layer resistance measurement. This increased uniformity is an additional reason for the barrier height improvement. In contrast, the diodes formed at room temperature exhibit poorer performance due to an unpassivated surface and non-uniform metal coverage on a microscopic level.

  • PDF