• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.222-222
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• 2000

The general dicing process cuts a semiconductor wafer to lengthwise and crosswise direction by using a rotating circular diamond blade. But inferior goods are made under the influence of several parameters in dicing such as blade, wafer, cutting water and cutting conditions. Moreover we can not applicable this dicing method to GaN wafer, because the GaN wafer is harder than the other wafer as GaAs. In older to overcome this problem, a new dicing process is necessary. This paper describes a new machine using scriber and precision servo mechanism in order to dice a semiconductor wafer.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.1
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• pp.43-48
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• 2002

Semiconductor chip encapsulation process is employed to protect the chip and to achieve optimal performance of the chip. Expert decision-making to obtain the appropriate package design or process conditions with high yields and high productivity is quite difficult. In this paper, an expert system for semiconductor chip encapsulation has been constructed which combines a knowledge-based system with CAE software.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.481-482
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• 2008

In this paper, the advanced process has been presented to remove the WSix peeling that was made in sub 100nm DRAM SRCAT(Sphere-shaped-Recess-Ch annel-Array Transistor). The source of WSix peeling was proved to be the groove of gate poly film. We have completely solved the problems to adopt the gate-poly CMP (Chemical Mechanical Polishing) process.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.67-74
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• 1994

Effects of the GaAs semiconductor particles on electrophysical phenomena at the Pt electrode/10S0-3TM KCl aqueous electrolyte interfaces have been studied using voltammetric time based and electrochemical impedance techniques. The anodic decomposition effect f the GaAs semiconductor particles on electrophysical phenomena was significantly observed during the positive potential scan (0 to 1.0 V vs. SCE). On the other hand, the cathodic decomposition effect of the GaAs semiconductor particles was negligible during thenegative potential scan (0 to -1.0 V vs. SCE). The GaAs semiconductor particles act as current activators or mediators during the anodic process and act as charge screens during the cathodic process. The electrolyte resistance and related impedance was increased due to the presence of the GaAs semiconductor particles. The anodic decomposition effect of the GaAs semiconductor particles can directly be applied to activate the hydrogen evolution.

• Journal of Korean Institute of Industrial Engineers
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• v.41 no.6
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• pp.572-578
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• 2015

Yield prediction is one of the most important issues in semiconductor manufacturing. Especially, for a fast-changing environment of the semiconductor industry, accurate and reliable prediction techniques are required. In this study, we propose a prediction model to predict wafer yield based on virtual metrology process parameters in semiconductor manufacturing. The proposed prediction model addresses imbalance problems frequently encountered in semiconductor processes so as to construct reliable prediction model. The effectiveness and applicability of the proposed procedure was demonstrated through a real data from a leading semiconductor industry in South Korea.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.311-314
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• 1988

This paper describes 256k (256K ${\times}$1) CMOS SRAM utilizing 1.2um double-polysilicon and double-metal CMOS process. A typical access time of 16ns with a 30-pF load has been achieved through the use of a block architecture, a new decoder, an unique bit-line scheme and an optimized process. Operating current is 55mA at 40MHz and 15mA at 10MHz. A high-resistive polysilicon load has been used to achieve a standby current of 3uA.

• Journal of the Korean Society of Industry Convergence
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• v.15 no.1
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• pp.37-42
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• 2012

Trends in semiconductor equipment industry are to reduce the cost of producing semiconductor, semiconductor process development, facility development, and the minimum investment in terms of cost and quality. Semiconductor equipments are being considered to review and development is proceeding at the same time. In the first part of the semiconductor assembly process, in which the importance of die bonding process is emerging, a wide leadframe type die bonding machine is demanded for productivity. Die bonding machine was designed through experiments and by trial and error. It costs a lot of time and financial burden. The purpose of this study is to solve these problems by using the CAE tool 3G. By using finite element method, thermal analysis of die bonding machine to the various widths leadframe die bonder machine rail is performed for design.

• IE interfaces
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• v.16 no.3
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• pp.344-351
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• 2003

Critical dimension is one of the most important characteristics of up-to-date integrated circuit devices. Hence, critical dimension control in a semiconductor wafer fabrication process is inevitable in order to achieve optimum device yield as well as electrically specified functions. Currently, in complex semiconductor wafer fabrication processes, statistical methodologies such as Shewhart-type control charts become crucial tools for practitioners. Meanwhile, given a critical dimension sampling plan, the analysis of variance technique can be more effective to investigating critical dimension variation, especially for on-chip and on-wafer variation. In this paper, relating to a typical sampling plan, linear statistical models are presented for the analysis of critical dimension variation. A case study is illustrated regarding a semiconductor wafer fabrication process.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.41-44
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• 2002

The Semiconductor Industrial are developed after 1940. It was called “Rice of Industrial”. It needs great effect in Electronics. It was developed highly in recent several years with semiconductor manufacturing equipments. Semiconductor manufacturing devices are developed “In-line” type in the first stage. But It was non-effective in modem many type process. Because this reason, Cluster type manufacturing equipments are proposed. Cluster have ability of many-type-process and effective-scheduling by circular type process chamber In this paper. we propose a real-time 3D monitoring and simulation of this semiconductor manufacturing equipments. By proposed monitoring method, we have capability real visual maintanance & virtual simulation. This effective visual 3D monitoring could apply another dangerous environment in entire industrial.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.354-355
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• 2009

In the fabrication of inverted top-emitting organic light emitting diodes (ITOLEDs), the sputtering process is needed for deposition of transparent conducting oxide (TCO) as top anode. Energetic particle bombardment, however, changes the physical properties of underlying layers. In this study, we examined plasma process effects on tungsten oxide ($WO_3$) hole injection layer (HIL). From our results, we suggest the theoretical mechanism to explain the correlation between the physical property changes caused by plasma process on $WO_3$ HIL and degradation of device performances.