• Title/Summary/Keyword: Semiconductor Defect

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Effects of Trench Depth on the STI-CMP Process Defects (트랜치 깊이가 STI-CMP 공정 결함에 미치는 영향)

  • 김기욱;서용진;김상용
    • Journal of the Microelectronics and Packaging Society
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    • v.9 no.4
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    • pp.17-23
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    • 2002
  • The more productive and stable fabrication can be obtained by applying chemical mechanical polishing (CMP) process to shallow trench isolation (STI) structure in 0.18 $\mu\textrm{m}$ semiconductor device. However, STI-CMP process became more complex, and some kinds of defect such as nitride residue, tern oxide defect were seriously increased. Defects like nitride residue and silicon damage after STI-CMP process were discussed to accomplish its optimum process condition. In this paper, we studied how to reduce torn oxide defects and nitride residue after STI-CMP process. To understand its optimum process condition, We studied overall STI-related processes including trench depth, STI-fill thickness and post-CMP thickness. As an experimental result showed that as the STI-fill thickness becomes thinner, and trench depth gets deeper, more tern oxide were found in the CMP process. Also, we could conclude that low trench depth whereas high CMP thickness can cause nitride residue, and high trench depth and over-polishing can cause silicon damage.

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Low Reverse Saturation Current Density of Amorphous Silicon Solar Cell Due to Reduced Thickness of Active Layer

  • Iftiquar, S M;Yi, Junsin
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.939-942
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    • 2016
  • One of the most important characteristic curves of a solar cell is its current density-voltage (J-V) curve under AM1.5G insolation. Solar cell can be considered as a semiconductor diode, so a diode equivalent model was used to estimate its parameters from the J-V curve by numerical simulation. Active layer plays an important role in operation of a solar cell. We investigated the effect thicknesses and defect densities (Nd) of the active layer on the J-V curve. When the active layer thickness was varied (for Nd = 8×1017 cm-3) from 800 nm to 100 nm, the reverse saturation current density (Jo) changed from 3.56×10-5 A/cm2 to 9.62×10-11 A/cm2 and its ideality factor (n) changed from 5.28 to 2.02. For a reduced defect density (Nd = 4×1015 cm-3), the n remained within 1.45≤n≤1.92 for the same thickness range. A small increase in shunt resistance and almost no change in series resistance were observed in these cells. The low reverse saturation current density (Jo = 9.62×10-11 A/cm2) and diode ideality factor (n = 2.02 or 1.45) were observed for amorphous silicon based solar cell with 100 nm thick active layer.

Analysis of Electrical Characteristics due to Deep Level Defects in 4H-SiC PiN Diodes (4H-SiC PiN 다이오드의 깊은 준위 결함에 따른 전기적 특성 분석)

  • Tae-Hee Lee;Se-Rim Park;Ye-Jin Kim;Seung-Hyun Park;Il Ryong Kim;Min Kyu Kim;Byeong Cheol Lim;Sang-Mo Koo
    • Korean Journal of Materials Research
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    • v.34 no.2
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    • pp.111-115
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    • 2024
  • Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

A Study on the BGA Package Measurement using Noise Reduction Filters (잡음제거 필터를 이용한 BGA 패키지 측정에 관한 연구)

  • Jin, Go-Whan
    • Journal of the Korea Convergence Society
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    • v.8 no.11
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    • pp.15-20
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    • 2017
  • Recently, with the development of the IT industry, interest in computer convergence technology is increasing in various fields. Especially, in the semiconductor field, a vision system that uses a camera and computer convergence is often used to inspect semiconductor device defects in the production process. Various systems have been studied to remove noise, which is a major cause of degradation in processing of data related to these image processing systems. In this paper, we try to detect defects in BGA (Ball Grid Array) package devices by recognizing defects in advance during mass production. We propose a measurement system using a Gaussian filter, a Median filter, and an Average filter, which are widely used for noise reduction of image data Applying the proposed system to the manufacturing process of the BGA package can be used to judge whether the defect is good or not, and it is expected that productivity will be improved.

Improvement of the carrier transport property and interfacial behavior in InGaAs quantum well Metal-Oxide-Semiconductor Field-Effect-Transistors with sulfur passivation (황화 암모늄을 이용한 Al2O3/HfO2 다층 게이트 절연막 트랜지스터 전기적 및 계면적 특성 향상 연구)

  • Kim, Jun-Gyu;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.29 no.4
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    • pp.266-269
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    • 2020
  • In this study, we investigated the effect of a sulfur passivation (S-passivation) process step on the electrical properties of surface-channel In0.7Ga0.3As quantum-well (QW) metal-oxide-semiconductor field-effect transistors (MOSFETs) with S/D regrowth contacts. We fabricated long-channel In0.7Ga0.3As QW MOSFETs with and without (NH4)2S treatment and then deposited 1/4 nm of Al2O3/HfO2 through atomic layer deposition. The devices with S-passivation exhibited lower values of subthreshold swing (74 mV/decade) and drain-induced barrier lowering (19 mV/V) than the devices without S-passivation. A conductance method was applied, and a low value of interface trap density Dit (2.83×1012 cm-2eV-1) was obtained for the devices with S-passivation. Based on these results, interface traps between InGaAs and high-κ are other defect sources that need to be considered in future studies to improve III-V microsensor sensing platforms.

Influence of Electron Beam Irradiation on the Electrical Properties of Zn-Sn-O Thin Film Transistor (Zn-Sn-O 박막 트랜지스터의 전기적 특성에 대한 전자빔 조사의 영향)

  • Cho1, In-Hwan;Jo, Kyoung-Il;Choi, Jun Hyuk;Park, Hai-Woong;Kim, Chan-Joong;Jun, Byung-Hyuk
    • Korean Journal of Materials Research
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    • v.27 no.4
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    • pp.216-220
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    • 2017
  • The effect of electron beam (EB) irradiation on the electrical properties of Zn-Sn-O (ZTO) thin films fabricated using a sol-gel process was investigated. As the EB dose increased, the saturation mobility of ZTO thin film transistors (TFTs) was found to slightly decrease, and the subthreshold swing and on/off ratio degenerated. X-ray photoelectron spectroscopy analysis of the O 1s core level showed that the relative area of oxygen vacancies ($V_O$) increased from 10.35 to 12.56 % as the EB dose increased from 0 to $7.5{\times}10^{16}electrons/cm^2$. Also, spectroscopic ellipsometry analysis showed that the optical band gap varied from 3.53 to 3.96 eV with increasing EB dose. From the results of the electrical property and XPS analyses of the ZTO TFTs, it was found that the electrical characteristic of the ZTO thin films changed from semiconductor to conductor with increasing EB dose. It is thought that the electrical property change is due to the formation of defect sites like oxygen vacancies.

Influence of Defects on Electrical Characteristics of Distributing Cable Termination (배전급 케이블 종단부의 결점이 전기적 특성에 미치는 영향)

  • Kim, Sang-Hyun;Choi, Jae-Hyeong;Choi, Jin-Wook;Kim, Young-Seok;Kim, Sun-Gu;Baek, Seung-Myeong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.2
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    • pp.190-195
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    • 2009
  • This paper introduces experimental investigates of an electrical accident of the distributing cable termination with simulated a shoddy construction. We prepared two termination kites, one is built-in type, the other is heat contraction type. Also, we manufactured cable termination that have simulated defect by badness construction and investigated their insulation characteristics such as ac (35[kV], 1[min]) and impulse (95[kV], $1.2{\times}50[{\mu}s]$) withstand test. The influence of defects such as thickness decrease, the gap between stress-con of housing and semiconductor and heating time on insulating properties of the termination have been studied. The thickness decrease of an insulator decreases ac breakdown strength suddenly and the breakdown traces of the insulator that is damaged by knife displayed elliptic shape. The gap of between stress-con and semiconductor deteriorates dielectric strength of insulator seriously. In heat contraction type, the ac breakdown voltage became low when the heating time is short.

A comparative analysis of deep level emission in the ZnO layers deposited by various methods (다양한 방법으로 성장된 ZnO layer의 Deep level emission에 대한 비교 분석)

  • Ahn, C.H.;Kim, Y.Y.;Kim, D.C.;Kong, B.H.;Han, W.S.;Choi, M.K.;Cho, H.K.;Lee, J.H.;Kim, H.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.102-103
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    • 2008
  • Magnetron Sputtering, MOCVD, Thermal Evaporation에 의해 성장된 ZnO layer에 대한 Dependency Temperature Photoluminescence (PL)를 이용하여 비교 분석을 통해 Deep level emission에 대해 연구하였다. Sputter에 의해 성장된 ZnO 박막은 Violet, Green, Orange-red 영역의 $Zn_i$, $V_o$, $O_i$의 defect에 의한 Deep level emission을 보였고, MOCVD에 의해 성장된 박막은 비교적 산소양이 낮은 성장 조건에서는 blue-green 영역에서, 산소양이 높은 조건에서의 박막은 Orange-red 영역의 Deep level emission을 보였다. Blue-green 영역에서의 emission은 온도가 증가함에 따라 다른 Barrier를 보였는데, 이는 $V_{Zn}$$V_o$에 의한 것임을 알 수 있었다. 한편, ZnO nanorods는 $V_o$에 의한 Green 영역에서의 Deep level emission을 보였다.

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Si(100)기판 위에 증착된$CeO_2$(200)박막과 $CeO_2$(111) 박막의 전기적 특성 비교

  • 이헌정;김진모;김이준;정동근
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.67-67
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    • 2000
  • CeO2는 cubic 구조의 일종인 CaR2 구조를 가지고 있으며 격자상수가 Si의 격장상수와 매우 비슷하여 Si 기판위에 에피텍셜하게 성장할 수 있는 가능성이 매우 크다. 따라서 SOI(silicon-on-insulator)구조의 실현을 위하여 Si 기판위에 CeO2 박막을 에피텍셜하게 성장시키려는 많은 노력이 있어왔다. 또한 metal-ferroelectric-semiconductor field effect transistor)에서 ferroelectric 박막과 Si 기판사이의 완충층으로 사용된다. 이러한 CeO2의 응용을 위해서는 Si 기판 위에 성장된 CeO2 박막의 방위성 및 CeO2/Si 구조의 전기적 특성을 알아보는 것이 매우 중요하다. 본 연구에서는 Si(100) 기판위에 CeO2(200)방향으로 성장하는 박막과 EcO2(111) 방향으로 성장하는 박막을 rf magnetron sputtering 방법으로 증착하여 각각의 구조적, 전기적 특성을 분석하였다. RCA 방법으로 세정한 P-type Si(100)기판위에 Ce target과 O2를 사용하여 CeO2(200) 및 CeO2(111)박막을 증착하였다. 증착후 RTA(rapid thermal annealing)방법으로 95$0^{\circ}C$, O2 분위기에서 5분간 열처리를 하였다 이렇게 제작된 CeO2 박막의 구조적 특성을 XRD(x-ray diffraction)방법으로 분석하였고, Al/CeO2/Si의 MIS(metal-insulator-semiconductor)구조를 제작하여 C-V (capacitance-voltage), I-V (current-voltage) 특성을 분석하였으며 TEM(transmission electron microscopy)으로 증착된 CeO2막과 Si 기판과의 계면 특성을 연구하였다. C-V특성에 있어서 CeO2(111)/Si은 CeO2(111)의 두께가 증가함에 따라 hysteresis windows가 증가한 방면 CeO2(200)/Si은 hysteresis windows가 아주 작을뿐만 아니라 CeO2(200)의 두께가 증가하더라도 hysteresis windos가 증가하지 않았다. CeO2(111)/Si과 CeO2(200)/Si의 C-V 특성의 차이는 CeO2(111)과 CeO2(200)이 Si 기판에 의해 받은 stress의 차이와 이에 따른 defect형성의 차이에 의한 것으로 사료된다.

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Photo-response of Polysilicon-based Photodetector depending on Deuterium Incorporation Method (중수소 결합 형성 방법에 따른 다결정 실리콘 광검출기의 광반응 특성)

  • Lee, Jae-Sung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.11
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    • pp.29-35
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    • 2015
  • The photo-response characteristics of polysilicon based metal-semiconductor-metal (MSM) photodetector structure, depending on deuterium treatment method, was analyzed by means of the dark-current and the light-current measurements. Al/Ti bilayer was used as a Schottky metal. Our purpose is to incorporate the deuterium atoms into the absorption layer of undoped polysilicon, effectively, for the defect passivation. We have introduced two deuterium treatment methods, a furnace annealing and an ion implantation. In deuterium furnace annealing, deuterium bond was distributed around polysilicon surface where the light current flows. As for the ion implantation, even thought it was a convenient method to locate the deuterium inside the polysilicon film, it creates some damages around polysilicon surface. This deteriorated the photo-response in our photodetector structure.